MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 999

IC MCU 32BIT E300 324TEPBGA

MPC5125YVN400

Manufacturer Part Number
MPC5125YVN400
Description
IC MCU 32BIT E300 324TEPBGA
Manufacturer
Freescale Semiconductor
Series
MPC51xxr

Specifications of MPC5125YVN400

Core Processor
e300
Core Size
32-Bit
Speed
400MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, USB OTG
Peripherals
DMA, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.33 V ~ 1.47 V
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
324-PBGA
Processor Series
MPC51xx
Core
e300
Data Bus Width
32 bit
Development Tools By Supplier
TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
Maximum Clock Frequency
400 MHz
Operating Supply Voltage
1.4 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Data Ram Size
32 KB
I/o Voltage
3.3 V
Interface Type
CAN, I2C
Minimum Operating Temperature
- 40 C
Program Memory Size
32 bit
Cpu Speed
400MHz
Embedded Interface Type
CAN, I2C, SPI, UART, USB
Digital Ic Case Style
TEPBGA
No. Of Pins
324
Rohs Compliant
Yes
Cpu Family
MPC5xx
Device Core Size
32b
Frequency (max)
400MHz
Total Internal Ram Size
32KB
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
324
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Manufacturer
Quantity
Price
Part Number:
MPC5125YVN400
Manufacturer:
Freescale Semiconductor
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Should any combination other than the one shown above exist, DCD must take proper action. Transfer
failure mechanisms are indicated in the device error matrix.
In addition to checking the status bit, DCD must read the transfer bytes field to determine the actual bytes
transferred. When a transfer is complete, the total bytes transferred is decremented by the actual bytes
transferred. For transmit packets, a packet is only complete after the actual bytes reaches zero, but for
receive packets, the host may send fewer bytes in the transfer according to the USB variable length packet
protocol.
32.8.7.4
It is necessary for the DCD to flush to de-prime one more endpoints on a USB device reset or during a
broken control transfer. There may also be application specific requirements to stop transfers in progress.
The DCD can use the following procedure to stop a transfer in progress:
32.8.8
The following table summarizes packet errors that are not automatically managed by the USB controller.
1
The device controller manages all errors on bulk/control/interrupt endpoints except for a data buffer
overflow. However, for ISO endpoints, errors packets are not retried and errors are tagged as indicated.
Freescale Semiconductor
Overflow
ISO Packet Error
ISO Fulfillment Error
This error also set the halt bit in the dQH and if there are dTDs remaining in the linked list for the endpoint, those are not
executed.
1. Write a 1 to the corresponding bit(s) in USB_ENDPTFLUSH.
2. Wait until all bits in USB_ENDPTFLUSH are 0.
3. Read USB_ENDPTSTATUS to ensure all endpoints commanded to be flushed are now 0. If the
Data Buffer Error = 0
corresponding bits are 1 after the second step has finished, flush has failed as described here:
In rare cases, a packet is in progress to the particular endpoint is commanded to flush using
USB_ENDPTFLUSH. A safeguard is in place to refuse the flush to ensure the packet in progress
completes successfully. The DCD may need to repeatedly flush any endpoints that fail to flush by
repeating steps one through three until each endpoint is successfully flushed.
1
Device Error Matrix
Flushing/De-priming an Endpoint
This operation may take a large amount of time depending on the USB bus
activity. It is not desirable to have this wait loop within an interrupt service
routine.
Error
MPC5125 Microcontroller Reference Manual, Rev. 2
Table 32-97. Device Error Matrix
NOTE
Direction
Both
RX
RX
Packet Type
Universal Serial Bus Interface with On-The-Go
ISO
Any
ISO
Data Buffer
Error Bit
1
0
0
Transaction
Error Bit
0
1
1
32-171

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