MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 952

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Universal Serial Bus Interface with On-The-Go
Periodic Interrupt—Do-Complete-Split
This state is entered unconditionally from the Do Start Split state after a start-split transaction is executed
on the bus. Each time the host controller visits a queue head in this state (within the execute transaction
state), it checks to determine whether a complete-split transaction should be executed now.
There are four tests to determine whether a complete-split transaction should be executed.
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Test A. cMicroFrameBit is bit-wise ANDed with QH[C-mask] field. A non-zero result indicates
software scheduled a complete-split for this endpoint, during this micro-frame.
Test B. QH[FrameTag] is compared with the current contents of USB_FRINDEX[7:3]. An equal
indicates a match.
Test C. The complete-split progress bit vector is checked to determine whether the previous bit is
set, indicating the previous complete-split was appropriately executed. An example algorithm for
this test is provided below:
Test D. Check if a start-split should be executed in this micro-frame. This is the same test
performed in the Do Start Split state. When it evaluates to TRUE and the controller is NOT
processing in the context of a recovery path mode, it means a start-split should occur in this
micro-frame. Test D and Test A evaluating to TRUE at the same time is a system software error.
Behavior is undefined.
Algorithm Boolean CheckPreviousBit(QH.C-prog-mask, QH.C-mask, cMicroFrameBit)
Begin
-- Return values:
-- TRUE - no error
-- FALSE - error
--
Boolean rvalue = TRUE;
previousBit = cMicroframeBit logical-rotate-right(1)
-- Bit-wise anding previousBit with C-mask indicates
-- whether there was an intent
-- to send a complete split in the previous micro-frame. So,
-- if the
-- 'previous bit' is set in C-mask, check C-prog-mask to
-- make sure it
-- happened.
If (previousBit bitAND QH.C-mask)then
End If
-- If the C-prog-mask already has a one in this bit position,
-- then an aliasing
-- error has occurred. It probably get caught by the
-- FrameTag Test, but
-- at any rate it is an error condition that as detectable here
-- should not allow
-- a transaction to be executed.
If (cMicroFrameBit bitAND QH.C-prog-mask) then
rvalue = FALSE;
End if
return (rvalue)
End Algorithm
End if
rvalue = FALSE;
MPC5125 Microcontroller Reference Manual, Rev. 2
If not(previousBit bitAND QH.C-prog-mask) then
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