MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 367

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

1
14.3.5
14.3.5.1
The FEC ID (ETH_FEC_ID) register is a read-only register. The FEC ID register is used to identify the
FEC block and revision.
Freescale Semiconductor
FEC1: 0xFF40_2800
FEC2: 0xFF40_4800
Address: Base + 0x000
Default absolute offset with IMMRBAR at default location of 0xFF40_0000. See
Map (XLBMEN + Mem Map).”
Reset
Reset
0x2E4–0x3FF
FEC_BASE
Offset from
W
W
0x2CC
0x2DC
R
R
0x2C0
0x2C4
0x2C8
0x2D0
0x2D4
0x2D8
0x2E0
16
0
0
0
0
Register Descriptions
FEC ID (ETH_FEC_ID) Register
1
17
0
0
0
1
RMON_R_P_GTE2048—RMON RX packets with > 2048 bytes
RMON_R_OCTETS—RMON RX octets
IEEE_R_DROP—Frames counted incorrectly
IEEE_R_FRAME_OK—Frames received OK
IEEE_R_CRC—Frames received with CRC error
IEEE_R_ALIGN—Frames received with alignment error
IEEE_R_MACERR—Receive FIFO overflow count
R_FDXFC—Flow control pause frames received
IEEE_R_OCTETS_OK—Octet count for frames received
without error
Reserved
18
0
0
0
2
19
0
0
0
3
MPC5125 Microcontroller Reference Manual, Rev. 2
Figure 14-2. FEC ID Register (ETH_FEC_ID)
Table 14-4. MIB Counters (continued)
20
4
0
0
0
DMA FIFO SMII
21
0
0
5
Register
22
0
0
6
23
0
0
7
FEC_ID
24
8
0
0
25
9
0
0
Chapter 2, “System Configuration and Memory
10
26
0
0
Access Reset Value Section/Page
FEC_REV
11
27
0
0
Fast Ethernet Controller (FEC)
12
28
0
0
Access: User read-only
13
29
0
0
14
30
0
0
14-11
15
31
0
0