MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 685

IC MCU 32BIT E300 324TEPBGA

MPC5125YVN400

Manufacturer Part Number
MPC5125YVN400
Description
IC MCU 32BIT E300 324TEPBGA
Manufacturer
Freescale Semiconductor
Series
MPC51xxr

Specifications of MPC5125YVN400

Core Processor
e300
Core Size
32-Bit
Speed
400MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, USB OTG
Peripherals
DMA, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.33 V ~ 1.47 V
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
324-PBGA
Processor Series
MPC51xx
Core
e300
Data Bus Width
32 bit
Development Tools By Supplier
TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
Maximum Clock Frequency
400 MHz
Operating Supply Voltage
1.4 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Data Ram Size
32 KB
I/o Voltage
3.3 V
Interface Type
CAN, I2C
Minimum Operating Temperature
- 40 C
Program Memory Size
32 bit
Cpu Speed
400MHz
Embedded Interface Type
CAN, I2C, SPI, UART, USB
Digital Ic Case Style
TEPBGA
No. Of Pins
324
Rohs Compliant
Yes
Cpu Family
MPC5xx
Device Core Size
32b
Frequency (max)
400MHz
Total Internal Ram Size
32KB
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
324
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Freescale Semiconductor
Time Out En
PM
Address: Base + 0x00
Address: Base + 0x00
00
01
RxRTS
Reset
Reset
Field
B/C
PM
PT
W
W
R
R
RxRTS
UART Receiver request-to-send. Allows RTS output to control the CTS input of the transmitting device to
prevent receiver overrun. If the receiver and transmitter are incorrectly programmed for RTS control, RTS
control is disabled for both. Transmitter RTS control is configured in MR2[TxRTS]. Not used in codec mode.
0 Receiver has no effect on RTS .
1 When a valid start bit is received, RTS is negated if the PSC FIFO is full.
Other Modes. Reserved.
UART. Enable the time out counter. If the time out counter is disabled, the TIME_OUT status in the SR was
also cleared.
0 Time out counter is disabled
1 Time out counter is enabled
Other Modes. Reserved.
UART. Parity mode. Selects the parity or multi-drop mode for the channel. The parity bit is added to the
transmitted character, and the receiver performs a parity check on incoming data. The value of PM affects PT,
as shown
Other Modes. Reserved.
UART. Parity Type. PM and PT together select parity type (PM = 0x) or determine whether a data or address
character is transmitted (PM = 11). PT is not used in codec mode. See
Other Modes. Reserved.
UART. Bits per Character. Selects the number of data bits per character to be sent. The values shown do not
include start, parity, or stop bits. B/C is not used in codec mode.
00 5 bits
01 6 bits
10 7 bits
11 8 bits
Other Modes. Reserved.
0
0
0
0
0
Parity Mode
Force parity
With parity
Table
Figure 25-5. Mode Register 1 for Other Modes (MR1)
Figure 25-3. Mode Register 1 for UART Mode (MR1)
1
0
0
1
0
0
25-5. PM is not used in codec mode.
Table 25-5. Parity Mode/Parity Type Definitions
MPC5125 Microcontroller Reference Manual, Rev. 2
Time Out En
Table 25-4. MR1 field descriptions
0
0
1
2
2
Parity Type (PT=0)
0
0
1
3
3
Even parity
Low parity
Description
PM
0
0
0
4
4
Table
PT
0
0
0
Programmable Serial Controller (PSC)
5
5
25-5.
Parity Type (PT=1)
Access: User read/write
Access: User read/write
High parity
Odd parity
0
0
1
6
6
B/C
0
0
1
7
7
25-7

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