MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 188

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Byte Data Link Controller (BDLC)
6.4.7.6.3
Transmitting a Type 3 IFR, with or without a CRC byte, is done in a fashion similar to transmitting a
message frame. The user loads the first byte to be transmitted into the BDLC Data Register and then sets
the appropriate TMIFR bit, depending upon whether a CRC byte is desired. When the last byte is written
to the BDLC Data Register, the TEOD bit is set, and a CRC byte (if desired) and an EOD are then
transmitted. Because the two versions of the Type 3 IFR are transmitted identically, the description that
follows discusses both. For an illustration of the Type 3 IFR transmit sequence, refer to
6-52
into BDLC_DLCBDR
in BDLC_DLCBCR2
DLCBSVR =0x1C?
Enter Type 2 IFR
(error detected)
transmit routine
Load IFR byte
is discarded
Set TSIFR
IFR byte
BDLC_
Yes
Transmitting a Type 3 IFR
No
After BDLC module detects
MPC5125 Microcontroller Reference Manual, Rev. 2
attempt is complete
DLCBSVR = 0x14?
EOF, IFR transmit
Exit Type 1 IFR
transmit routine
Figure 6-23. Transmitting A Type 2 IFR
BDLC_
(LOA)
No
Jump to receive IFR
handling routine
Yes
Jump to receive IFR
transmit attempt?
Was this the last
handling routine
is discarded
IFR byte
Yes
No
Was the eleventh
in DLCBCR2
Set TEOD
MSG byte
received?
Freescale Semiconductor
Yes
Figure
No
6-24.