MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 874

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Universal Serial Bus Interface with On-The-Go
32.2.4.20 Endpoint Setup Status (USB_ENDPTSETUPSTAT) Register (Non-EHCI)
The Endpoint Setup Status Register (USB_ENDPTSETUPSTAT) contains the endpoint setup status. It is
used only by the OTG module in device mode. This register is not defined in the EHCI specification.
32.2.4.21 Endpoint Initialization (USB_ENDPTPRIME) Register (Non-EHCI)
The Endpoint Initialization (USB_ENDPTPRIME) register is used to initialize endpoints. It is used only
by the OTG module in device mode. This register is not defined in the EHCI specification.
32-46
ENDPTSETUPSTAT Endpoint Setup Status. For every setup transaction received, a corresponding bit in this register is set
Address: Base + 0x1AC
Reset
Reset
Field
CM
W
W
R
R
Field
16
0
0
0
0
0
Controller Mode.
This register can only be written once after reset. If necessary to switch modes, software must reset the
controller by writing to the RESET bit in the USB_USBCMD register before reprogramming this register.
00 Idle (Default for combination host/device).
01 Reserved.
10 Device Controller (Default for device only controller).
11 Host Controller (Default for host only controller).
The OTG module defaults to the idle state and needs to be initialized to the desired operating mode after reset.
17
Figure 32-34. Endpoint Setup Status Register (USB_ENDPTSETUPSTAT)
0
0
0
0
1
to 1. Software must clear or acknowledge the setup transfer by writing a 1 to a respective bit after it has
read the setup data from queue head. The response to a setup packet as in the order of operations and
total response time is crucial to limit bus timeouts while the setup lock our mechanism is engaged. See
Section 32.8.4, “Managing Endpoints.”
This register is used only in device mode.
18
0
0
0
0
2
Table 32-34. USB_USBMODE field descriptions (continued)
Table 32-35. USB_ENDPTSETUPSTAT field descriptions
19
0
0
0
0
3
MPC5125 Microcontroller Reference Manual, Rev. 2
20
4
0
0
0
0
21
0
0
0
0
5
22
0
0
0
0
6
23
0
0
0
0
7
Description
Description
24
8
0
0
0
0
25
9
0
0
0
0
10
26
0
0
0
0
11
27
0
0
0
0
12
28
0
0
0
Freescale Semiconductor
ENDPTSETUPSTAT
Access: User read/write
13
29
0
0
0
w1c
14
30
0
0
0
15
31
0
0
0