MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 799

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

28.4.2
The DMA interface block controls all data routing between the external data bus (DMA access), internal
SDHC module data bus, and internal system FIFO access through a dedicated state machine that monitors
the status of FIFO content (empty or full), FIFO address, and byte/block counters for the SDHC module
and the application. See
Freescale Semiconductor
CMD53
WLAN Frame is divided equally into 64-byte blocks plus the remainder 32 bytes.
Eight 64-byte blocks are sent in block transfer mode and the remainder remove carriage return/line feed.
The 32 bytes are sent in byte transfer mode.
DMA Interface
MAC Header
SDIO Data
802.11
SDIO Data
block #1
block #1
64 bytes
Data
Figure 28-19
Figure 28-18. Example for Dividing Large Data Transfer
MPC5125 Microcontroller Reference Manual, Rev. 2
IV
544 Bytes WLAN Frame
SDIO Data
SDIO Data
block #2
block #2
64 bytes
Data
for illustration of the DMA interface block.
Frame Body
SDIO Data
SDIO Data
block #8
block #8
64 bytes
Data
Secure Digital Host Controller (SDHC)
ICV
SDIOData
32 bytes
32 bytes
CMD53
FCS
Data
SDIOData
32 bytes
28-27