MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 419

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

15.2.1.4
1
Freescale Semiconductor
Address: Base + 0x0C (GPT0)
To clear any of these bits, it is necessary to clear all of them. An 1F must be written to bits 27:31.
CAPTURE
Reset
Reset
PWMP
COMP
UDOV
TEXP
CAFT
Field
OVF
PIN
W
W
R
R
Base + 0x1C (GPT1)
Base + 0x2C (GPT2)
Base + 0x3C (GPT3)
16
0
0
0
GPT0–GPT7 Status (GPT_STATUS) Register
Read of internal counter latch at reference event. This is pertinent only in IC mode, in which case it represents
the count value at the time the Input Event occurred. Capture status does not shadow the internal counter
while an event is pending, it is updated only at the time the Input Event occurs.
Note: If ICT is set to 11, which is Pulse Capture Mode, the Capture value records the width of the pulse. Also,
Represents how many times internal counter has rolled over. This is pertinent only during IC mode and would
represent an extremely long period of time between Input Events. However, if STOP_CONT = 1 (indicating
cumulative reporting of Input Events), this field could come into play.
Note: This field is cleared by any sticky bit status write in the 5 bit fields below (27,28, 29, 30, 31).
Registered state of the I/O PIN (all modes). The IP Bus Clock registers the state of the I/O input. Valid, even
if Timer is not enabled.
Up/down counter has wrapped in up/updown/rotary IC submode , i.e. overflowed from 0xFFFF to 0x0000 or
underflowed from 0x0000 to 0xFFFF. Cleared by writing 1 to this bit position. Also cleared if Timer_MS is 000
(i.e., Timer not enabled). See Note
Timer Expired in Internal Timer mode. Cleared by writing 1 to this bit position. Also cleared if Timer_MS is 000
(i.e., Timer not enabled). See Note
PWM end of period occurred. Cleared by writing 1 to this bit position. Also cleared if Timer_MS is 000 (i.e.,
Timer not enabled). See Note
OC reference event occurred. Cleared by writing 1 to this bit position. Also cleared if Timer_MS is 000 (i.e.,
Timer not enabled). See Note
IC reference event occurred. Cleared by writing 1 to this bit position. Also cleared if Timer_MS is 000 (i.e.,
Timer not enabled). See Note
17
0
0
1
the Stop_Cont bit is irrelevant in Pulse Capture Mode, operation is as if Stop_Cont were 0.
OVF
18
0
0
2
Figure 15-4. GPT0–GPT7 Status (GPT_STATUS) Register
19
0
0
3
MPC5125 Microcontroller Reference Manual, Rev. 2
Table 15-6. GPT_STATUS field descriptions
Base + 0x4C (GPT4)
Base + 0x5C (GPT5)
Base + 0x6C (GPT6)
Base + 0x7C (GPT7)
20
4
0
0
1
1
1
21
.
.
.
0
0
5
1
1
.
.
22
0
0
6
PIN
CAPTURE
23
0
0
7
Description
24
8
0
0
25
9
0
0
10
26
0
0
UDOV TEXP PWMP COMP CAFT
w1c
11
27
0
0
General Purpose Timers (GPT)
w1c
12
28
0
0
Access: User read/write
w1c
13
29
0
0
w1c
14
30
0
0
w1c
15
31
15-9
0
0