MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 655

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

1
23.8.2.3
This command is used to erase blocks.
Freescale Semiconductor
If want to read status after second command 0x10 issued, set FLASH_CMD_BYTE3 = 0x70,
FLASH_CMD_CODE = 0b0000_0001_1101_1000. Then after “Wait for the R/B handshake“, NFC issues
FLASH_CMD_BYTE3 to flash, and read status. If STOP_ON_WERR = 1 and STATUS_BYTE1[0] = 1, operation stops,
otherwise, CMD_DONE_IRQ comes out. The COL_ADDR2 and ROW_ADDR3 of the first FLASH_CMD_CODE may not be
necessary, reference note 1 of
FLASH_CMD_BYTE1 = 0x80,
FLASH_CMD_BYTE2 = 0x10,PAGE_CNT = 4,
FLASH_CMD_CODE=0b0111_1111_0000_0000
Config BUFNO, COL_ADDR, ROW_ADDR ,
SECTOR_SIZE , IRQ_STATUS, others optional regs
CPU writes 4 pages data to SRAM buffer
1
Config BUFNO,IRQ_STATUS
Register
Config
CPU writes the next 4 pages data to SRAM buffer
FLASH_CMD_CODE=0b000_0001_1100_0000
Block Erase
Figure 23-21. Flow Chart of Page Program Operation, PAGE_CNT = 8, No DMA
BUSY/START=1
BUSY/START=1
Figure
START
MPC5125 Microcontroller Reference Manual, Rev. 2
23-18.
NFC Actions
Issue FLASH_CMD_BYTE1 to flash
Issue COL_ADDR,ROW_ADDR to flash
Write 4 virtual pages data to flash
Write the next 4 virtual pages to flash
Issue FLASH_CMD_BYTE2 to flash
Wait for the R/B handshake
CMD_DONE_IRQ
CMD_DONE_IRQ
END
NAND Flash Controller (NFC)
23-25