MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 233

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

to beginning the write sequence, the write executes using the data captured during the bus error. If a bus
error occurs on the last write prior to switching to the next read sequence, the read sequence executes
before the channel is terminated due to the destination bus error.
The occurrence of any type of error causes the DMA_ENGINE to immediately stop, and the appropriate
channel bit in the DMA error register to be asserted. At the same time, the details of the error condition
are loaded into the DMAES register. The major loop complete indicators, setting the transfer control
descriptor done flag and the possible assertion of an interrupt request, are not affected when an error is
detected.
Freescale Semiconductor
Address: Base + 0x0004
ERRCHN[5:0]
Reset
Reset
Field
GPE
CPE
SOE
VLD
SAE
W
W
R VLD
R GPE
16
0
0
0
Logical OR of all DMAERRH
and DMAERRL status bits.
0 No DMAERR bits are set.
1 At least one DMAERR bit is set indicating a valid error exists that has not been cleared.
Group Priority Error
0 No group priority error.
1 The last recorded error was a configuration error among the group priorities. All group priorities are not
Channel Priority Error
0 No channel priority error.
1 The last recorded error was a configuration error in the channel priorities within a group. All channel
Error Channel Number
The channel number of the last recorded error (excluding GPE and CPE errors).
Source Address Error
0 No source address configuration error.
1 The last recorded error was a configuration error detected in the TCD.SADDR field. TCD.SADDR is
Source Offset Configuration
0 No source offset configuration error.
1 The last recorded error was a configuration error detected in the TCD.SOFF field. TCD.SOFF is
CPE
17
0
0
0
1
unique.
priorities within a group are not unique.
inconsistent with TCD.SSIZE.
inconsistent with TCD.SSIZE.
18
0
0
0
2
19
0
0
0
Figure 9-2. DMA Error Status Register (DMAES)
3
MPC5125 Microcontroller Reference Manual, Rev. 2
ERRCHN[5:0]
20
Table 9-5. DMAES field descriptions
4
0
0
0
21
0
0
0
5
22
0
0
0
6
23
0
0
0
7
Description
SAE
24
8
0
0
0
SOE
25
9
0
0
0
DAE
10
26
0
0
0
DOE
11
27
0
0
0
Direct Memory Access (DMA)
NCE
12
28
0
0
0
Access: User read-only
SGE
13
29
0
0
0
SBE
14
30
0
0
0
DBE
15
31
9-13
0
0
0