MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 355

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Chapter 13
External Memory Bus (EMB)
13.1
13.1.1
The external memory bus (EMB) includes two different parallel interfaces, the LocalPlus bus and the
NAND flash bus. The two buses are time multiplexed.
An EMB arbiter controls the multiplexing of the external pins (address and data lines) and grants the
different bus masters to allow them to drive the external bus. The arbiter can be configured via the
Share and Wait Count (LPC_EMB_SC) Register
within the LPC memory map.
13.1.2
13.2
13.2.1
The EMB mux switches, depending on EMB arbiter state, between the two different functions. The
activated, granted module can drive the external bus.
Table 13-2
Freescale Semiconductor
LPC
NFC
Activated, Granted
•
•
Module
Arbitration between LPC and NFC
— LPC CSB transfers cannot be paused.
— LPC CSB request pauses NFC transaction immediately or after share counter expires.
— LPC FIFO request pauses NFC transaction after share counter expires
Pin muxing between LPC and NFC
Introduction
Functional Description
describes which functionality is at the EMB bus depending on the activated, granted module.
Overview
Features
EMB Mux
LPC_AD[31:16]
12’H000,NFC_ALE,NFC_CLE,
NFC_RE,NFC_WE
Multiplexed Functionality at
EMB_AD[31:16]
MPC5125 Microcontroller Reference Manual, Rev. 2
Table 13-2. EMB_AD Multiplexing
LPC_AD[15:0]
NFC_AD[15:0]
and
Multiplexed Functionality at
EMB Pause Control (LPC_EMB_PC) Register
EMB_AD[15:0]
LPC_AX[2:0]
Multiplexed Functionality at
EMB_AX[2:0]
EMB
13-1