MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 754

IC MCU 32BIT E300 324TEPBGA

MPC5125YVN400

Manufacturer Part Number
MPC5125YVN400
Description
IC MCU 32BIT E300 324TEPBGA
Manufacturer
Freescale Semiconductor
Series
MPC51xxr

Specifications of MPC5125YVN400

Core Processor
e300
Core Size
32-Bit
Speed
400MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, USB OTG
Peripherals
DMA, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.33 V ~ 1.47 V
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
324-PBGA
Processor Series
MPC51xx
Core
e300
Data Bus Width
32 bit
Development Tools By Supplier
TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
Maximum Clock Frequency
400 MHz
Operating Supply Voltage
1.4 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Data Ram Size
32 KB
I/o Voltage
3.3 V
Interface Type
CAN, I2C
Minimum Operating Temperature
- 40 C
Program Memory Size
32 bit
Cpu Speed
400MHz
Embedded Interface Type
CAN, I2C, SPI, UART, USB
Digital Ic Case Style
TEPBGA
No. Of Pins
324
Rohs Compliant
Yes
Cpu Family
MPC5xx
Device Core Size
32b
Frequency (max)
400MHz
Total Internal Ram Size
32KB
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
324
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Part Number:
MPC5125YVN400
Manufacturer:
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Real Time Clock (RTC)
27.3.2.2
The RTC Date Set Register (RTC_DSR) is used to program the RTC current date register (see
Section 27.3.2.6, “RTC Current Date Register
the running date value. Notice that the value in year_set field of the RTC new year and stopwatch register
(see
into the current date register after the proper software sequence using the set_date and pause_date bits.
27-6
WEEKDAY_SET New weekday written in RTC current date register after state machine transition by set_date and pause_date
Address: Base + 0x04
PAUSE_DATE
MONTH_SET
SET_DATE
Reset
Reset
Section 27.3.2.3, “RTC New Year and Stopwatch Register (RTC_NY_STP)
Field
W
W
R
R
16
0
0
0
0
0
RTC Date Set Register (RTC_DSR)
A software sequence using the pause_date bit in conjunction with the set_date bit must be followed to load
new values into the RTC current time register
The SET_DATE bit cannot be set to 1 unless the PAUSE_DATE bit is also set to 1.
The proper software sequence is:
The MONTH_SET, WEEKDAY_SET, and the DATE_SET fields should remain consistent throughout the four
steps (i.e., at the desired new time values).
The YEAR_SET field is located in the RTC new year and stopwatch register. The month, weekday, date and
year fields are all set at the completion of step 4 of the previous sequence.
It is important to use
instructions such as
Used with set_time above to perform time update. Must be zero for normal operation.
New month written in RTC current date register after successful state machine transition by set_date and
pause_date bits. Only the lower 4 bits of this field are used.
bits. 1 = Monday; 7 = Sunday. Only the lower 3 bits of this field are used. If 0 is written (not recommended),
the weekday is set to 0 until the end of the day. The weekday is then incremented to 1.
• Step 1. Write register with MONTH_SET, WEEKDAY_SET, DATE_SET, and YEAR_SET fields set to the
• Step 2. Write register with MONTH_SET, WEEKDAY_SET, DATE_SET, and YEAR_SET fields set to the
• Step 3. Write register with MONTH_SET, WEEKDAY_SET, DATE_SET, and YEAR_SET fields set to the
• Step 4. Write register with MONTH_SET, WEEKDAY_SET, DATE_SET, and YEAR_SET fields set to the
• At completion of Step 4, RTC Current date register is updated with the new time.
17
0
0
0
0
1
desired values and with PAUSE_DATE = 1 and SET_DATE = 0.
desired values and with PAUSE_DATE = 1 and SET_DATE = 1.
desired values and with PAUSE_DATE = 1 and SET_DATE = 0.
desired values and with PAUSE_DATE = 0 and SET_DATE = 0.
18
0
0
0
2
19
0
0
0
3
Figure 27-3. RTC Date Set Register (RTC_DSR)
MPC5125 Microcontroller Reference Manual, Rev. 2
WEEKDAY_SET
AND
Table 27-4. RTC_DSR field descriptions
LOAD
20
4
0
0
0
or
and
OR
21
0
0
0
5
to modify this register.
STORE
_DATE
SET
(RTC_CDR)”). The RTC date set register does not reflect
22
0
0
operations to access this register. Do not use read-modify-write
6
PAUSE
_DATE
23
0
0
7
(Section 27.3.2.5, “RTC Current Time Register
Description
24
8
0
0
0
0
25
9
0
0
0
0
10
26
0
0
0
11
27
0
0
Register”) is also loaded
DATE_SET
12
28
0
0
Freescale Semiconductor
MONTH_SET
Access: User read/write
13
29
0
0
(RTC_CTR)”).
14
30
0
0
15
31
0
0

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