MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 526

IC MCU 32BIT E300 324TEPBGA

MPC5125YVN400

Manufacturer Part Number
MPC5125YVN400
Description
IC MCU 32BIT E300 324TEPBGA
Manufacturer
Freescale Semiconductor
Series
MPC51xxr

Specifications of MPC5125YVN400

Core Processor
e300
Core Size
32-Bit
Speed
400MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, USB OTG
Peripherals
DMA, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.33 V ~ 1.47 V
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
324-PBGA
Processor Series
MPC51xx
Core
e300
Data Bus Width
32 bit
Development Tools By Supplier
TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
Maximum Clock Frequency
400 MHz
Operating Supply Voltage
1.4 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Data Ram Size
32 KB
I/o Voltage
3.3 V
Interface Type
CAN, I2C
Minimum Operating Temperature
- 40 C
Program Memory Size
32 bit
Cpu Speed
400MHz
Embedded Interface Type
CAN, I2C, SPI, UART, USB
Digital Ic Case Style
TEPBGA
No. Of Pins
324
Rohs Compliant
Yes
Cpu Family
MPC5xx
Device Core Size
32b
Frequency (max)
400MHz
Total Internal Ram Size
32KB
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
324
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC5125YVN400
Manufacturer:
Freescale Semiconductor
Quantity:
135
Part Number:
MPC5125YVN400
Manufacturer:
LTC
Quantity:
29
Part Number:
MPC5125YVN400
Manufacturer:
Freescale Semiconductor
Quantity:
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I/O Control
Figure 20-3
which type of configuration register is responsible to configure the different pads. Additionally, it shows
the different functional muxing possibilities.
20.2.2.3.1
20.2.2.3.2
20-8
Figure 20-4. Standard with Pull-up/down Resistors and Schmitt trigger I Control Register (STD_PU_ST)
Address: See
Address: See
FUNCMUX
Reset
Reset
Field
PUD
PUE
DS
— Programmable Schmitt trigger input
— Programmable pull-up/down resistors
W
W
R
R
and
Table 20-6
Table 20-6
Standard with Pull-up/down Resistors (STD_PU)
Standard with Pull-up/down Resistors and Schmitt trigger input
(STD_PU_ST)
Functional multiplexing. Controls the functional pin muxing of the pad.
00 ALT0 (default)
01 ALT1
10 ALT2
11 ALT3
Pull-up/down direction. Controls the direction of the pull resistors.
0 Pull-down resistor enabled, if PUE is 1.
1 Pull-up resistor enabled, if PUE is 1.
Pull-up/down enable. Enables the pull-up/down usage.
0 Pull resistor is disabled.
1 Pull resistor is enabled.
Drive select /slew rate. Controls the drive select and slew rate of the general I/O pad.
00 General I/O slew rate configuration 0
01 General I/O slew rate configuration 1
10 General I/O slew rate configuration 2
11 General I/O slew rate configuration 3
Note: Slew rate classes are defined in the MPC5125 Microcontroller Data Sheet
0
0
0
0
0
0
Figure 20-4
Figure 20-3. Standard with Pull-up/down Resistors (STD_PU)
1
0
1
0
describe the two different types of configuration registers.
FUNCMUX
FUNCMUX
MPC5125 Microcontroller Reference Manual, Rev. 2
Table 20-4. STD_PU field descriptions
0
0
2
2
PUD
PUD
0
0
3
3
Description
PUE
PUE
0
0
4
4
ST
0
0
0
5
5
Freescale Semiconductor
Access: User read/write
Access: User read/write
0
0
Table 20-6
6
6
DS
DS
shows
0
0
7
7

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