MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 793

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

28.3.2.12 SDHC Command Argument (SDHC_ARG) Register
The SDHC Command Argument (SDHC_ARG) register contains the MMC/SD/SDIO command
argument.
Figure 28-13
28.3.2.13 SDHC Response FIFO Access (SDHC_RES_FIFO) Register
The SDHC Response FIFO Access (SDHC_RES_FIFO) register is an 8 x 16 bit FIFO in the SDHC used
to store the response from the card. The FIFO data can be read using this register. The most significant 16
bits of the response are accessed first, and the least significant 16 bits are accessed last.
Figure 28-14
Freescale Semiconductor
Address: Base + 0x2C
COMMAND
Reset
Reset
NUMBER
Field
Field
ARG
W
W
R
R
16
0
0
0
shows the SDHC_ARGregister and
shows the SDHC_RES_FIFO register and
Command Number. The SDHC module communicates with the MMC/SD/SDIO card(s) by sending commands
and arguments. The command to send is set in the MMC/SD Command Number Register (CMD), and the
argument is defined in SDHC CMD Argument (SDHC_ARG register).
0x00 CMD0
0x01 CMD1
...
...
0x3F CMD63
Note: Check the detailed information from the related card specification.
Command Argument. Specifies the argument for the current command.
Note: Check the detailed command argument information from the related card specification.
17
0
0
1
Figure 28-13. SDHC Command Argument (SDHC_ARG) Register
18
0
0
2
19
0
0
3
MPC5125 Microcontroller Reference Manual, Rev. 2
Table 28-15. SDHC_CMD field descriptions
Table 28-16. SDHC_ARG field descriptions
20
4
0
0
21
0
0
5
22
0
0
6
Table 28-16
ARG[16:31]
ARG[0:15]
23
0
0
7
Description
Description
Table 28-17
24
8
0
0
describes the bit fields.
25
9
0
0
describes the bit fields.
10
26
0
0
Secure Digital Host Controller (SDHC)
11
27
0
0
12
28
0
0
Access: User read/write
13
29
0
0
14
30
0
0
28-21
15
31
0
0