MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 976

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Universal Serial Bus Interface with On-The-Go
transfer descriptor) is copied into the overlay area of the dQH, which starts at the next TD pointer 32-bit
word and continues through the end of the buffer pointers 32-bit words. After a transfer is complete, the
dTD status 32-bit word is updated in the dTD pointed to by the current TD pointer. While a packet is in
progress, the overlay area of the dQH is a staging area for the dTD so the device controller can access
needed information with little minimal latency.
32.7.1.1
This 32-bit word specifies static information about the endpoint; in other words, this information does not
change over the lifetime of the endpoint. Device controller software should not attempt to modify this
information while the corresponding endpoint is enabled.
32-148
31
Mult zlt
30
29
Endpoint Capabilities/Characteristics
This bitmap needs to be redrawn
Device Controller Read/Write
28
0
27
26
25
Total Bytes
Buffer Pointer (Page 0)
Buffer Pointer (Page 1)
Buffer Pointer (Page 2)
Buffer Pointer (Page 3)
Buffer Pointer (Page 4)
Maximum Packet Length
24
23
MPC5125 Microcontroller Reference Manual, Rev. 2
22
21
Figure 32-72. Endpoint Queue Head
Current dTD Pointer
Next dTD Pointer
20
19
Set-up Buffer Bytes 3…0
Set-up Buffer Bytes 7…4
18
17
Reserved
Device Controller Read Only.
16
ios
ioc
15
14
13
0
12
Transfer Overlay
MultO
11
10
9
0
8
Current Offset
0
7
Reserved
Reserved
Reserved
Reserved
6
5
Status
4
3
0
Freescale Semiconductor
0
2
1
T
0