MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 435

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

16.4
The GPIO module supports 32 GPIO pins. Each GPIO pin can be configured as an input or output. If a
GPIO pin is configured as an input, the pin can optionally generate an interrupt upon the detection of a
change in state. If the GPIO interrupt control register bits for a particular GPIO pin are configured as 00,
the GPIO pin detects any change of state, sets its corresponding bit in the GPIO_GPIER register and, if
enabled, generates an interrupt. If the GPIO interrupt control register bits for a particular GPIO pin are
configured as 01 or 10, the GPIO pin respectively detects a low-to-high transition or a high-to-low
transition, sets the corresponding bit in the GPIO_GPIER register and, if enabled, generates an interrupt.
If a GPIO pin is configured as an output, it can be individually configured as an open-drain or a fully active
output.
Freescale Semiconductor
Address: Base + 0x14
Address: Base + 0x18
Reset
Reset
Reset
Reset
D[0:31]
Field
W
W
W
W
R
R
R
R
Functional Description
16
16
0
0
0
0
0
0
D16
D24
D0
D8
Edge detection mode. The corresponding GPIO pin asserts an interrupt request according to the following:
00 Any change on the state of the GPIO pin generates an interrupt request.
01 Low-to-high change on the GPIO pin generates an interrupt request.
10 High-to-low change on the GPIO pin generates an interrupt request.
11 Pulse (any 2 transitions) on the GPIO pin generates an interrupt request.
17
17
0
0
0
0
1
1
Table 16-7. GPIO_GPICR1 and GPIO_GPICR2 field descriptions
Figure 16-7. GPIO Interrupt Control Register 1 (GPIO_GPICR1)
18
18
Figure 16-8. GPIO Interrupt Control Register (GPIO_GPICR2)
0
0
0
0
2
2
D17
D25
D1
D9
19
19
0
0
0
0
3
3
MPC5125 Microcontroller Reference Manual, Rev. 2
20
20
4
0
0
4
0
0
D10
D18
D26
D2
21
21
0
0
0
0
5
5
22
22
0
0
0
0
6
6
D11
D19
D27
D3
23
23
0
0
0
0
7
7
Description
24
24
8
0
0
8
0
0
D12
D20
D28
D4
25
25
9
0
0
9
0
0
10
26
10
26
0
0
0
0
D13
D21
D29
D5
11
27
11
27
0
0
0
0
12
28
12
28
General Purpose I/O (GPIO)
0
0
0
0
Access: User read/write
Access: User read/write
D14
D22
D30
D6
13
29
13
29
0
0
0
0
14
30
14
30
0
0
0
0
D15
D23
D31
D7
15
31
15
31
16-7
0
0
0
0