MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 522

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

I/O Control
20-4
IOCONTROL_BASE
(0xFF40_A000)
Offset from
0x04A
0x04B
0x04C
0x04D
0x04E
0x05A
0x05B
0x05C
0x05D
0x05E
0x047
0x048
0x049
0x04F
0x050
0x051
0x052
0x053
0x054
0x055
0x056
0x057
0x058
0x059
0x05F
0x060
0x061
0x062
1
IO_CTL_DIU_LD20—DIU_LD20 pad control register (STD_PU)
IO_CTL_DIU_LD21—DIU_LD21 pad control register (STD_PU)
IO_CTL_DIU_LD22—DIU_LD22 pad control register (STD_PU)
IO_CTL_DIU_LD23—DIU_LD23 pad control register (STD_PU)
IO_CTL_CAN4_RX—I2C2_SCL pad control register (STD_PU_ST)
IO_CTL_CAN4_TX—I2C2_SDA pad control register (STD_PU_ST)
IO_CTL_CAN1_TX—CAN1_TX pad control register (STD_PU_ST)
IO_CTL_CAN2_TX—CAN2_TX pad control register (STD_PU_ST)
IO_CTL_I2C1_SCL—I2C1_SCL pad control register (STD_PU_ST)
IO_CTL_I2C1_SDA—I2C1_SDA pad control register (STD_PU_ST)
IO_CTL_FEC1_TXD_2—FEC1_TXD_2 pad control register (STD_PU)
IO_CTL_FEC1_TXD_3—FEC1_TXD_3 pad control register (STD_PU)
IO_CTL_FEC1_RXD_2—FEC1_RXD_2 pad control register (STD_PU)
IO_CTL_FEC1_RXD_3—FEC1_RXD_3 pad control register (STD_PU)
IO_CTL_FEC1_CRS—FEC1_CRS pad control register (STD_PU)
IO_CTL_FEC1_TX_ER—FEC1_TX_ER pad control register (STD_PU)
IO_CTL_FEC1_RXD_1—FEC1_RXD_1 pad control register (STD_PU)
IO_CTL_FEC1_TXD_1—FEC1_TXD_1 pad control register (STD_PU)
IO_CTL_FEC1_MDC—FEC1_MDC pad control register (STD_PU)
IO_CTL_FEC1_RX_ER—FEC1_RX_ER pad control register (STD_PU)
IO_CTL_FEC1_MDIO—FEC1_MDIO pad control register
(STD_PU_ST)
IO_CTL_FEC1_RXD_0—FEC1_RXD_0 pad control register (STD_PU)
IO_CTL_FEC1_TXD_0—FEC1_TXD_0 pad control register
(STD_PU_ST)
IO_CTL_FEC1_TX_CLK—FEC1_TX_CLK pad control register
(STD_PU_ST)
IO_CTL_FEC1_RX_CLK—FEC1_RX_CLK pad control register
(STD_PU_ST)
IO_CTL_FEC1_RX_DV—FEC1_RX_DV pad control register
(STD_PU_ST)
IO_CTL_FEC1_TX_EN—FEC1_TX_EN pad control register (STD_PU)
IO_CTL_FEC1_COL—FEC1_COL pad control register (STD_PU_ST)
MPC5125 Microcontroller Reference Manual, Rev. 2
Table 20-1. I/O Control Memory Map
Register
2
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Freescale Semiconductor
Reset
Value
0x1C
0x1C
0x1C
0x1C
0x00
0x00
0x00
0x00
0x18
0x18
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x04
0x00
0x00
0x00
0x00
0x04
0x04
0x00
0x00
0x04
Section/Page
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