MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 818

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Software Watchdog Timer (WDT)
29.2
The WDT programmable register map occupies 16 bytes of memory-mapped space. Reading undefined
portions of the memory map returns all 0s; writing has no effect.
It is recommended that user software not access undefined or reserved locations in the programmable
register map for the WDT or any other module. Some locations in the programmable register map may be
designated as undefined or reserved, but in fact, may contain non-user mode registers used for testing or
for modifying the operation of the module.
All WDT registers are 16 or 32 bits wide, located on 16-bit address boundaries, and should be accessed as
16-bit or 32-bit quantities. That is, 16-bit wide registers should be addressed using half-word accesses, and
32-bit wide registers should be addressed using word accesses. All addresses used in this chapter are
offsets from the WDT base address, as defined in
29.2.1
A memory map of the WDT is shown in
1
29.2.2
29.2.2.1
The Software Watchdog Control Register (WDT_SWCRR), shown in
watchdog period and configures WDT operation. The WDT_SWCRR can be read at any time but can be
only written once after system reset.
29-2
(0xFF40E_0900)
Default absolute offset with IMMRBAR at default location of 0xFF40_0000. See
Map (XLBMEN + Mem Map).”
0x0004–0xFF
WDT_BASE
Offset from
0x0C–0x0D
0x0E
0x00
0x04
0x08
Memory Map/Register Definition
Memory Map
Register Descriptions
Software Watchdog Control Register (WDT_SWCRR)
1
Reserved
WDT_SWCRR—Software watchdog control register
WDT_SWCNR—Software watchdog count register
Reserved
SWSRR—Software watchdog service register
Reserved
MPC5125 Microcontroller Reference Manual, Rev. 2
Table 29-1. WDT memory map
Register
Table
29-1.
Section 2.2, “Memory Map and Register Definition.”
Chapter 2, “System Configuration and Memory
Access
Figure
R/W
W
R
29-1, controls the software
0x0000_0004
0x0000_0000
Reset Value
0x0000
Freescale Semiconductor
Section/Page
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29.2.2.2/29-3
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