MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 298

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Display Interface Unit (DIU)
Internally, all the calculations are performed using pixels represented by 8 bits per component. For those
pixel formats in which fewer than 8 bits per color components are specified, the specified bits are used as
MSB, and the LSB are filled with 0s. The alpha values are extended to 8 bits as well, but the LSB are filled
by sign extension to make sure that minimum value is 0 and the maximum value is extended to 255.
If the original data bitmap does not include alpha, it can be specified in the global alpha (G_ALPHA) field
of the area descriptor and/or use chroma keying.
10.4.4.1
As an alternate to the larger bitmap formats, the DIU supports an 8-bit pixel format through a palette table
(256 × 32-bit look up table). The palette table maps an 8-bit input pixel to a 32-bit color format. The palette
table is stored in a 256 × 32 bit embedded SRAM. It is accessed by the hardware as an indexed matrix such
that palettized_pixel [31:0] = palette_table[input_pixel [7:0]].
The palette table should be created in advance in memory (DDR DRAM) as a consecutive sequence of
256 × 64 bits (with bits 32 to 63 filled with 0s). Writing to the PALETTE register (described in
Section 10.3.3.5, “Palette Table Pointer Register
new palette table from memory before it starts processing the next frame.
of the palette table in main memory.
10.4.5
For each pixel, besides the three color components (R, G, B), a fourth component defines the transparency
of the pixel. This transparency value is called alpha and has a range between 0 (pixel is completely
10-36
Palette
Entry
254
255
0
1
2
3
PALETTE
Alpha Blending
Offset
0x7F0
0x7F8
0x000
0x008
0x010
0x018
Palette Mode
Component Order
3, 2, 1, 0
R:G:B:A
P254_B
P255_B
n/a
P0_B
P1_B
P2_B
P3_B
000
Table 10-40. Examples of DIU Supported Pixel Formats
MPC5125 Microcontroller Reference Manual, Rev. 2
Figure 10-45. Palette Table Format in Memory
P254_G
P255_G
P0_G
P1_G
P2_G
P3_G
001
Number of Bits per
Component
5:5:5:1
P254_R
P255_R
8
P0_R
P1_R
P2_R
P3_R
010
(PALETTE)”) causes the DIU to automatically reload a
......
Local Address [2:0]
P254_A
P255_A
P0_A
P1_A
P2_A
P3_A
011
G.Alpha
Yes
No
0x00
0x00
0x00
0x00
0x00
0x00
100
Figure 10-45
0x00
0x00
0x00
0x00
0x00
0x00
101
Palette
No
No
Freescale Semiconductor
0x00
0x00
0x00
0x00
0x00
0x00
shows the format
110
0x00
0x00
0x00
0x00
0x00
0x00
111