MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 895

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

32.5.4.4
Doublewords 4 and 5 are the data buffer page pointers for the transfer. This structure supports one physical
page cross. The most significant 20 bits of each doubleword in this section are the 4 KB (page) aligned
buffer pointers. The least significant 12 bits of each doubleword is an additional transfer state.
32.5.4.5
Doubleword 6 of an siTD is simply another schedule link pointer. This pointer is always 0 or references
an siTD. This pointer cannot reference any other schedule data structure.
Freescale Semiconductor
Current Offset
Buffer Pointer
Buffer Pointer
Back Pointer
(Page 0)
(Page 1)
T-Count
31:12
31:12
11:0
11:5
31:5
Bit
Bit
4:3
2:0
Bit
4:1
TP
0
T
siTD Buffer Pointer List (Plus)
siTD Back Link Pointer
Bits [31:12] is a 4K page-aligned, physical memory address. These bits correspond to physical address bits
[31:12] respectively. The field P specifies the current active pointer
The 12 least significant bits of the Page 0 pointer is the current byte offset for the current page pointer (as
selected with the page indicator bit (P field)). The host controller is not required to write this field back when the
siTD is retired (Active bit transitioned from a one to a zero).
Bits [31:12] is a 4 KB page-aligned, physical memory address. These bits correspond to physical address bits
[31:12] respectively. The field P specifies the current active pointer
Reserved.
Transaction position. This field is used with T-count to determine whether to send all, first, middle, or last with
each outbound transaction payload. System software must initialize this field with the appropriate starting
value. The host controller must correctly manage this state during the lifetime of the transfer. The bit encodings
are:
00 All. The entire full-speed transaction data payload is in this transaction (that is, less than or equal to 188
01 Begin. This is the first data payload for a full-speed transaction that is greater than 188 bytes.
10 Mid. This is the middle payload for a full-speed OUT transaction that is larger than 188 bytes.
11 End. This is the last payload for a full-speed OUT transaction that was larger than 188 bytes.
Transaction count. Software initializes this field with the number of OUT start-splits this transfer requires. Any
value larger than 6 is undefined.
This field is a physical memory pointer to an siTD.
Reserved. This field is reserved for future use. It should be cleared.
Terminate
0 siTD Back Pointer field is valid
1 siTD Back Pointer field is not valid
bytes).
MPC5125 Microcontroller Reference Manual, Rev. 2
Table 32-54. siTD Buffer Pointer Page 0 (Plus)
Table 32-55. siTD Buffer Pointer Page 1 (Plus)
Table 32-56. siTD Back Link Pointer
Description
Description
Description
Universal Serial Bus Interface with On-The-Go
32-67