MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 430

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

General Purpose I/O (GPIO)
16.3
All GPIO registers are 32 bits wide and are located on 32-bit address boundaries. All addresses used in this
chapter are offsets from the GPIO module base address. A GPIO module memory map is shown in
Table
16-2
GPIO2: 0xFF40_1180
GPIO1: 0xFF40_1100
DMA REQUEST [0:31]
GPIO_BASE
Offset from
0x1C–0x7F
16-1. Reading undefined portions of the memory map returns all zeros; writing has no effect.
0x0C
0x00
0x04
0x08
0x10
0x14
0x18
Memory Map/Register Definition
Peripheral Bus
To/From
gpio_int
1
GPIO Direction Register (GPIO_GPDIR)
GPIO Open Drain Register (GPIO_GPODR)
GPIO Data Register (GPIO_GPDAT)
GPIO Interrupt Event Register (GPIO_GPIER)
GPIO Interrupt Mask Register (GPIO_GPIMR)
GPIO External Interrupt Control Register 1
(GPIO_GPICR1)
GPIO External Interrupt Control Register 2
(GPIO_GPICR2)
Reserved
MPC5125 Microcontroller Reference Manual, Rev. 2
Figure 16-1. GPIO Module Block Diagram
Registers
Register
GPIMR/
GPIER/
GPICR
I/F
Table 16-1. GPIO memory map
Register
Registers
Register
GPODR
GPDIR/
GPDAT
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
2
Reset Value
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
Freescale Semiconductor
GPIO[0:31]
3
Section/Page
16.3.1.1/16-3
16.3.1.2/16-3
16.3.1.3/16-4
16.3.1.4/16-5
16.3.1.5/16-5
16.3.1.6/16-6
16.3.1.6/16-6