MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 156

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Byte Data Link Controller (BDLC)
6.4.1.2
The data bytes contained in the message include the message priority/type, message I.D. byte, and any
actual data being transmitted to the receiving node. See SAE J1850 - Class B Data Communications
Network Interface, for more information about 1 and 3 Byte Headers.
6.4.1.3
This byte is used by the receiver(s) of each message to determine if any errors have occurred during the
transmission of the message. The BDLC calculates the CRC byte and appends it onto any messages
transmitted onto the J1850 bus, and also performs CRC detection on any messages it receives from the
J1850 bus.
CRC generation uses the divisor polynomial X
set to all ones, and then each byte in the message after the SOF symbol is serially processed through the
CRC generation circuitry. The one’s complement of the remainder then becomes the 8-bit CRC byte,
which is appended to the message after the data bytes, in MSB to LSB order.
When receiving a message, the BDLC uses the same divisor polynomial. All data bytes, excluding the SOF
and EOD symbols, but including the CRC byte, are used to check the CRC. If the message is error free,
the remainder polynomial equals X
the calculated CRC does not equal 0xC4, the BDLC recognizes this as a CRC error and set the CRC error
flag in the BDLC_DLCBSVR register.
6.4.1.4
The EOD symbol is a long passive period on the J1850 bus used to signify to any recipients of a message
that the transmission by the originator has completed. No flag is set upon reception of the EOD symbol.
6.4.1.5
The IFR section of the J1850 message format is optional. Users desiring further definition of in-frame
response should review the SAE J1850 Class B Data Communications Network Interface specification.
6.4.1.6
This symbol is a passive period on the J1850 bus, longer than an EOD symbol, which signifies the end of
a message. Because an EOF symbol is longer than an EOD symbol, if no response is transmitted after an
EOD symbol, it becomes an EOF, and the message is assumed to be completed. The EOF flag is set upon
receiving the EOF symbol.
6-20
Messages transmitted by the BDLC module onto the J1850 bus must contain at least one data byte,
and therefore can be as short as one data byte and one CRC byte. Each data byte in the message is
8 bits in length, transmitted MSB to LSB.
In Message Data Bytes (Data)
Cyclical Redundancy Check Byte (CRC)
End-of-Data Symbol (EOD)
In-Frame Response Bytes (IFR)
End-of-Frame Symbol (EOF)
MPC5125 Microcontroller Reference Manual, Rev. 2
7
+ X
6
+ X
8
2
+ X
(0xC4), regardless of the data contained in the message. If
4
+ X
3
+ X
2
+ 1. The remainder polynomial is initially
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