MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 938

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Universal Serial Bus Interface with On-The-Go
The buffer pointer list in the qTD is long enough to support a maximum transfer size of 20K bytes. This
case occurs when all five buffer pointers are used and the first offset is zero. A qTD manages a 16 KB
buffer with any starting buffer alignment.
The host controller uses the C_Page field as an index value to determine which buffer pointer in the list
should be used to start the current transaction. The host controller uses a different buffer pointer for each
physical page of the buffer. This is true even if the buffer is physically contiguous.
The host controller must detect when the current transaction spans a page boundary and automatically
moves to the next available buffer pointer in the page pointer list. The next available pointer is reached by
incrementing C_Page and pulling the next page pointer from the list. Software must ensure there are
sufficient buffer pointers to move the amount of data specified in the bytes to transfer field.
Figure 32-62
and the C_Page field for a transfer size of 16383 bytes. C_Page is cleared. The upper 20-bits of Page 0
references the start of the physical page. Current offset (the lower 12-bits of queue head doubleword 7)
holds the offset in the page for example, 2049 (for example, 4096-2047). The remaining page pointers are
set to reference the beginning of each subsequent 4K page.
For the first transaction on the qTD (assuming a 512-byte transaction), the host controller uses the first
buffer pointer (page 0 because C_Page is cleared) and concatenates the current offset field. The 512 bytes
are moved during the transaction, and the current offset and total bytes to transfer are adjusted by 512 and
written back to the queue head working area.
During the fourth transaction, the host controller needs 511 bytes in page 0 and one byte in page 1. The
host controller increments C_Page (to 1) and uses the page 1 pointer to move the final byte of the
transaction. After the fourth transaction, the active page pointer is the page 1 pointer and current offset has
rolled to one, and both are written back to the overlay area. The transactions continue for the rest of the
buffer, with the host controller automatically moving to the next page pointer (that is, C_Page) when
necessary. There are three conditions for how the host controller manages C_Page.
32-110
illustrates a nominal example of how system software would initialize the buffer pointers list
Pointer (Page 0)
Pointer (Page 1)
Pointer (Page 2)
Pointer (Page 3)
Pointer (Page 4)
C_Page = 0
Figure 32-62. Example Mapping of qTD Buffer Pointers to Buffer Pages
MPC5125 Microcontroller Reference Manual, Rev. 2
2047
4096
4096
4096
2048
Bytes to Transfer = 16383 bytes
The physical pages in memory
may or may not be physically
contiguous.
Page 0 = 2047
Page 1 = 4096
Page 2 = 4096
Page 3 = 4096
Total:
Page 4 = 2048
16383
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