MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 1063

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

1
2
3
Freescale Semiconductor
0x1800–0x3FFF
In this column, the symbol “U” indicates one or more bits in a byte are undefined at reset. See the associated description for
more information.
Default absolute offset with IMMRBAR at default location of 0xFF40_0000. See
Map (XLBMEN + Mem Map).”
Reset value is indeterminate. See the associated description for more information.
from Module Base
0x1520–0x153C
0x1540–0x155C
0x1560–0x157C
0x1580–0x159C
0x15A0–0x115BC
0x1600–0x161C
0x1620–0x163C
0x1640–0x165C
0x1660–0x167C
0x1680–0x169C
0x1700–0x173C
0x1740–0x175C
0x1760–0x177C
0x1780–0x179C
0x117C0–0x171DC
Address Offset
0x15C0–0x15DC
0x16C0–0x16DC
0x1720–0x1713C
0x15E0–0x15FC
0x16A0–0x16BC
0x16E0–0x16FC
0x17A0–0x17BC
0x17E0–0x17FC
MPC5125 Microcontroller Reference Manual, Rev. 2, Release Candidate
Reserved
TCD41—Transfer Control Descriptors Channel 41
TCD42—Transfer Control Descriptors Channel 42
TCD43—Transfer Control Descriptors Channel 43
TCD44—Transfer Control Descriptors Channel 44
TCD45—Transfer Control Descriptors Channel 45
TCD46—Transfer Control Descriptors Channel 46
TCD47—Transfer Control Descriptors Channel 47
TCD48—Transfer Control Descriptors Channel 48
TCD49—Transfer Control Descriptors Channel 49
TCD50—Transfer Control Descriptors Channel 50
TCD51—Transfer Control Descriptors Channel 51
TCD52—Transfer Control Descriptors Channel 52
TCD53—Transfer Control Descriptors Channel 53
TCD54—Transfer Control Descriptors Channel 54
TCD55—Transfer Control Descriptors Channel 55
TCD56—Transfer Control Descriptors Channel 56
TCD57—Transfer Control Descriptors Channel 57
TCD58—Transfer Control Descriptors Channel 58
TCD59—Transfer Control Descriptors Channel 59
TCD60—Transfer Control Descriptors Channel 60
TCD61—Transfer Control Descriptors Channel 61
TCD62—Transfer Control Descriptors Channel 62
TCD63—Transfer Control Descriptors Channel 63
Table A-2. MPC5125 Detailed Register Map (continued)
Register
Chapter 2, “System Configuration and Memory
Access Reset Value
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
1
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Memory Map
A-59