MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 1011

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Freescale Semiconductor
from Module Base
Address Offset
0x68–0xFF
0x24–0xFF
0x08–0x0F
0x3C
0x4C
0x5C
0x0C
0x1C
0x38
0x40
0x44
0x48
0x50
0x54
0x58
0x60
0x64
0x00
0x04
0x08
0x10
0x14
0x18
0x20
0x00
0x04
MPC5125 Microcontroller Reference Manual, Rev. 2, Release Candidate
System External Interrupt Mask Register (IPIC_SEMSR)
System External Interrupt Control Register
(IPIC_SECNR)
System Error Status Register (IPIC_SERSR)
System Error Mask Register (IPIC_SERMR)
Reserved
System External Interrupt Polarity Check Register
(IPIC_SEPCR)
System Internal Interrupt Force Register
(IPIC_SIFCR_H)
System Internal Interrupt Force Register (IPIC_SIFCR_L)
System External Interrupt Force Register (IPIC_SEFCR)
System Error Force Register (IPIC_SERFR)
System Critical Interrupt Vector Register (IPIC_SCVCR)
SysteM Management Interrupt Vector Register
(IPIC_SMVCR)
Reserved
ACR—Arbiter Configuration Register
ATR—Arbiter Timers Register
ATER—Arbiter Transfer Error Register
AER—Arbiter Event Register
AIDR—Arbiter Interrupt Definition Register
AMR—Arbiter Mask Register
AEATR—Arbiter Event Attributes Register
AEADR—Arbiter Event Address Register
AERR—Arbiter Event Response Register
Reserved
Reset Configuration Word Low (RCWL) Register
Reset Configuration Word High (RCWH) Register
Reserved
Table A-2. MPC5125 Detailed Register Map (continued)
Chapter 8, “CSB Arbiter and Bus Monitor”
Reset Module (RESET) 0xFF40_0E00
CSB Arbiter 0xFF40_0D00
Register
Chapter 4, “Reset”
2
2
Access Reset Value
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
R
0xFFFF_FFFF
0x0U0U_0U00
0xUUU0_UU00
0x0UU0_0000
0xE080_0000
0x0000_003F
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
1
18.2.1.13/18-25
18.2.1.14/18-26
18.2.1.15/18-27
18.2.1.16/18-28
18.2.1.17/18-29
18.2.1.18/18-29
18.2.1.18/18-29
18.2.1.19/18-32
18.2.1.20/18-33
18.2.1.21/18-33
18.2.1.22/18-34
Section/Page
8.2.1.8/8-11
8.2.1.9/8-12
8.2.1.1/8-2
8.2.1.2/8-4
8.2.1.3/8-5
8.2.1.4/8-6
8.2.1.5/8-7
8.2.1.6/8-8
8.2.1.7/8-9
Memory Map
4.6.1/4-9
4.6.2/4-9
A-7