MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 497

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

19.1.5
Figure 19-4
SDA line must have an open-collector configuration. A pull-up register is required to ensure the SDA line
goes to a logic 1 when not driven by the master device. The receiver pulls the SDA line low during the
acknowledge clock pulse to signal correct reception of the data.
If a slave-receiver does not acknowledge the byte transfer, SDA must be left HIGH by the slave. The
master then generates a STOP condition to abort the transfer.
If a master-receiver does not acknowledge the slave transmitter after a byte transmission, it means
End-Of-Data (EOD) to the slave. The slave then releases the SDA line for the master to generate a STOP
or START signal.
19.1.5.1
A repeated START signal is a START signal generated without first generating a STOP signal to terminate
the communication. The master uses this to communicate with another slave or with the same slave in a
different mode without releasing the bus.
Various combinations of read/write formats are possible.
Freescale Semiconductor
•
SCL
SDA
Start
Transmitter
Receiver
The master-transmitter transmitting to a slave-receiver. The transfer direction is not changed.
SDA By
SDA By
SCL
Acknowledge
shows the transmitter releasing the SDA line after bit 0 is transmitted. All devices driving the
Bit7
Start
Repeated Start
1
Bit6
Figure 19-3. Timing Diagram–Start, Address Transfer and Stop Signal
2
Bit5 Bit4 Bit3
Slave Address
3
Figure 19-4. Timing Diagram – Receiver Acknowledgement
Bit7
4
1
MPC5125 Microcontroller Reference Manual, Rev. 2
5
Bit2 Bit1 Bit0(R/W)
Bit6
6
2
7
Bit5
3
8
Acknowledgement
From Receiver
SCL Held Low While
Interrupt Is Serviced
9
Bit4
4
(Byte Complete)
Interrupt Bit Set
Bit3
Bit7
Figure 19-5
5
1
Bit6
2
Bit2
6
Bit5 Bit4 Bit3
3
shows examples of:
4
DATA
Bit1
7
5
Bit0(R/W)
Bit2 Bit1 Bit0
6
8
Inter-Integrated Circuit (I
7
No Ack Bit
8
9
9
Stop
19-5
2
C)