MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 250

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Direct Memory Access (DMA)
Figure 9-28
9-30
CITER.LINKCH[5:0]
Address: Base + 0x1000 + (32 × n) + 0x14
CITER.E_LINK
Reset
Reset
CITER[14:9]
DOFF[15:0]
CITER[8:0]
W
W
R CITER.
R
Field
or
See
E_LINK
—
—
16
0
and
Table 9-1
—
—
Table 9-28
17
1
Enable Channel-to-Channel Linking on Minor Loop Complete. As the channel completes the inner minor
loop, this flag enables the linking to another channel, defined by CITER.LINKCH[5:0]. The link target
channel initiates a channel service request via an internal mechanism that sets the TCD.START bit of the
specified channel. If channel linking is disabled, the CITER value is extended to 15 bits in place of a link
channel number. If the major loop is exhausted, this link mechanism is suppressed in favor of the
MAJOR.E_LINK channel linking. This bit must be equal to the BITER.E_LINK bit otherwise a
configuration error is reported.
0 The channel-to-channel linking is disabled.
1 The channel-to-channel linking is enabled.
Current Major Iteration Count
or
Link Channel Number
If TCD.CITER.E_LINK equals 0,
No channel-to-channel linking (or chaining) is performed after the inner minor loop is exhausted. TCD
word 5, bits [30:25] are used to form a 15-bit CITER field.
or
After the minor loop is exhausted, the DMA_ENGINE initiates a channel service request at the channel
defined by CITER.LINKCH[5:0] by setting that channel’s TCD.START bit.
The value contained in CITER.LINKCH[5:0] must not exceed the number of implemented channels.
Current major iteration count.
Destination address signed offset.
and
—
—
18
2
CITER.LINKCH[5:0]
Table
Figure 9-27. TCDn Word 5 (TCDn.{CITER,DOFF}) Field
CITER[14:9] or
define word 6 of the TCDn structure, the DLAST_SGA field.
—
19
—
3
9-21.
MPC5125 Microcontroller Reference Manual, Rev. 2
Table 9-27. TCDn Word 5 field descriptions
—
—
20
4
—
—
21
5
—
—
22
6
DOFF[15:0]
—
—
23
7
Description
—
—
24
8
—
—
25
9
—
—
10
26
CITER[8:0]
—
—
11
27
—
—
12
28
Freescale Semiconductor
Access: User read/write
—
—
13
29
—
—
14
30
—
—
15
31