MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 689

IC MCU 32BIT E300 324TEPBGA

MPC5125YVN400

Manufacturer Part Number
MPC5125YVN400
Description
IC MCU 32BIT E300 324TEPBGA
Manufacturer
Freescale Semiconductor
Series
MPC51xxr

Specifications of MPC5125YVN400

Core Processor
e300
Core Size
32-Bit
Speed
400MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, USB OTG
Peripherals
DMA, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.33 V ~ 1.47 V
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
324-PBGA
Processor Series
MPC51xx
Core
e300
Data Bus Width
32 bit
Development Tools By Supplier
TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
Maximum Clock Frequency
400 MHz
Operating Supply Voltage
1.4 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Data Ram Size
32 KB
I/o Voltage
3.3 V
Interface Type
CAN, I2C
Minimum Operating Temperature
- 40 C
Program Memory Size
32 bit
Cpu Speed
400MHz
Embedded Interface Type
CAN, I2C, SPI, UART, USB
Digital Ic Case Style
TEPBGA
No. Of Pins
324
Rohs Compliant
Yes
Cpu Family
MPC5xx
Device Core Size
32b
Frequency (max)
400MHz
Total Internal Ram Size
32KB
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
324
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Part Number:
MPC5125YVN400
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25.4.1.4
The device supports internal and external clocks as source for the UART clock generation. Also the sample
rate of the UART controller can be selected in this register.
Freescale Semiconductor
UNEX_RX_SLOT AC97 Mode. Unexpected Receive Slots Detect.
DATA_VALID
Address: Base + 0x0C
CMD_SEND
DATA_OVR
Time Out
Reset
Field
W
R
Clock Select Register (CSR)
0
0
UART. Time Out.
0 No Time out event occurred.
1 Time out event occurred.
Other Modes. Reserved
AC97 Mode. Command Send Ready.
0 The data in the AC97CMD register was sent out by the AC97 transmitter.
1 The data in the AC97CMD register was not sent out. A write access to the AC97CMD register sets this
Other Modes. Reserved.
AC97 Mode. Receive Status Data Overwrite.
0 No received status data overwrite.
1 The received frame contains a new valid data status word in slot 2, but the previous received status data
Other Modes. Reserved.
AC97 Mode. Received Status Data.
0 The received frame does not contains valid status data.
1 The received frame contains a valid data status word in slot 2. The received data are located in the AC97
Other Modes. Reserved.
0 The received frame contains the slots defined in the AC97 slots register or a frame without AC97 data
1 The AC97 receiver detects a frame that does not match the rules above. The RX data of the frame that
Other Modes. Reserved.
bit. If the AC97 transmitter sends out the CMD data, this bit is cleared.
word was not read out before the new one was written to the AC97data register. Therefore, the old status
data word was lost. A read access to the AC97 data register clears this bit.
data register. A read access to the AC97data register clears this bit.
(frame is empty or contains only slot 1 or slot 2 data). The case that the receive frame contains all
expected data slots plus additional data slots will be also excepted. The RX data of a frame that matches
this rule is written to the RX FIFO.
triggers this bit will be ignored.
Figure 25-10. Clock Select Register for UART Mode (CSR)
1
0
MPC5125 Microcontroller Reference Manual, Rev. 2
Table 25-8. SR field descriptions (continued)
RCS
0
2
0
3
Description
0
4
0
Programmable Serial Controller (PSC)
5
TCS
Access: User read/write
0
6
0
7
25-11

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