MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 527

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

20.2.2.3.3
Freescale Semiconductor
LPC_CLK
LPC_OE
LPC_R/W
LPC_CS0
FUNCMUX
PAD Name
Field
PUD
PUE
DS
ST
Pad I/O Control Register
Functional multiplexing. Controls the functional pin muxing of the pad.
00 ALT0 (default)
01 ALT1
10 ALT2
11 ALT3
Pull-up/down direction. Controls the direction of the pull resistors.
0 If pull-up/down is enabled (PUE = 1), pull-down resistor enabled.
1 If pull-up/down is enabled (PUE = 1), pull-up resistor enabled.
Pull-up/down enable. Enables the pull-up/down usage.
0 Pull-up/down resistor is disabled.
1 Pull-up/down resistor is enabled.
Schmitt trigger. Enables the Schmitt trigger input of the pad.
0 Schmitt Trigger input is disabled.
1 Schmitt Trigger input is enabled.
Drive select /slew rate. Controls the drive select and slew rate of the general I/O pad.
00 General IO slew rate configuration 0.
01 General IO slew rate configuration 1.
10 General IO slew rate configuration 2.
11 General IO slew rate configuration 3.
Note: Slew rate classes are defined in the MPC5125 Microcontroller Data Sheet.
IOCONTROL_BASE
(0xFF40_A000)
Offset from
0x04
0x05
0x06
0x07
MPC5125 Microcontroller Reference Manual, Rev. 2
1
Table 20-5. STD_PU_ST field descriptions
Table 20-6. Pad I/O Control Register Table
STD_PU
STD_PU
STD_PU
STD_PU
Type
0x03
7’b00_000_11
0x03
7’b00_000_11
0x03
7’b00_000_11
0x1B
7’b00_110_11
Reset Value [6:0]
Description
2
2
2
3
00 LPC_CLK
01 TPA1
10 Reserved
11 GPIO04
00 LPC_OE
01 PSC3_3
10 Reserved
11 GPIO05
00 LPC_R/W
01 PSC3_4
10 Reserved
11 GPIO06
00 LPC_CS0
01 Reserved
10 Reserved
11 GPIO07
FUNCMUX
I/O Control
20-9