MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 164

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Byte Data Link Controller (BDLC)
Valid EOF and IFS Symbol
In
between T
If the passive to active transition beginning the SOF symbol of the next message occurs after T
current symbol is considered a valid EOF symbol followed by a valid IFS symbol. See
nodes must wait until a valid IFS symbol time has expired before beginning transmission. However, due
to variations in clock frequencies and bus loading, some nodes may recognize a valid IFS symbol before
others, and immediately begin transmitting. Therefore, anytime a node waiting to transmit detects a
passive to active transition once a valid EOF has been detected, it should immediately begin transmission,
initiating the arbitration process.
Idle Bus
If the passive to active transition beginning the SOF symbol of the next message does not occur before
T
immediately.
6-28
tv5(Min)
Figure
Passive
Passive
Active
Active
, the bus is considered to be idle, and any node wishing to transmit a message may do so
6-14(1), if the passive to active transition beginning the SOF symbol of the next message occurs
rv4(Min)
and T
rv4(Max)
280 µs
Figure 6-14. J1850 VPW EOF and IFS Symbols
MPC5125 Microcontroller Reference Manual, Rev. 2
, the current symbol is considered a valid EOF symbol.
300 µs
T
rv4(Min)
T
rv4(Max)
T
rv5(Min)
(1) Valid EOF Symbol
(2) Valid EOF+ IFS Symbol
Freescale Semiconductor
Figure
6-14(2). All
rv5(Min)
, the