MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 500

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Inter-Integrated Circuit (I
19.3
The I
I
is I
address (I
relative to their base offset. There are two common registers for the three I
control register and glitch filter control register.
The I
1
2
3
19-8
(0xFF40_1700)
2
C_BASE, which is memory mapped on the IP Bus address. The I
Offset from
I2C_BASE
Default absolute offset with IMMRBAR at default location of 0xFF40_0000. See
Map (XLBMEN + Mem Map).”
In this column, R/W = Read/Write, R = Read-only, and W = Write-only.
In this column, the symbol “U” indicates one or more bits in a byte are undefined at reset. See the associated description for
more information.
0x54–0x5F
0x68–0xFF
2
C_BASE + 0x00. The I
0x0C
0x2C
0x4C
0x00
0x04
0x08
0x10
0x20
0x24
0x28
0x30
0x40
0x44
0x48
0x50
0x60
0x64
2
2
C is controlled by 17 32-bit registers. The registers are located at an offset from I
C Interface registers are provided below:
Memory Map and Register Definition
2
C3_base_address) is I
1
I2C_MADR1 – I
I2C_MFDR1 – I
I2C_MCR1 – I
I2C_MSR1 – I
I2C_MDR1 – I
I2C_MADR2 – I
I2C_MFDR2 – I
I2C_MCR2 – I
I2C_MSR2 – I
I2C_MDR2 – I
I2C_MADR3 – I
I2C_MFDR3 – I
I2C_MCR3 – I
I2C_MSR3 – I
I2C_MDR3 – I
Reserved
I2C_ICR – I
I2C_MIFR – I
Reserved
2
C)
2
C Interrupt Control Register
2
2
2
2
2
2
2
2
2
2
C Filter Register
C1 Control Register
C1 Status Register
C1 Date I/O Register
C2 Control Register
C2 Status Register
C2 Date I/O Register
C3 Control Register
C3 Status Register
C3 Date I/O Register
2
2
2
2
2
2
2
C2 base address (I
C1 Address Register
C1 Frequency Divider Register
C2 Address Register
C2 Frequency Divider Register
C3 Address Register
C3 Frequency Divider Register
MPC5125 Microcontroller Reference Manual, Rev. 2
2
C_BASE + 0x40. Each of their own private registers addresses are
Table 19-3. I
Register
2
2
C2_base_address) is I
C block memory map
2
Chapter 2, “System Configuration and Memory
C1 base address (I
2
C_BASE + 0x20. The I
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
2
C modules: I
2
Reset Value
0x0000_0000
0x0000_0000
0x0000_0000
0x8000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x8000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x8000_0000
0x0000_0000
0x1500_0000
0x0000_0000
Freescale Semiconductor
2
C1_base_address)
2
C base address,
2
C interrupt
3
19.3.1.3/19-16
19.3.1.4/19-17
19.3.1.5/19-20
19.3.1.3/19-16
19.3.1.4/19-17
19.3.1.5/19-20
19.3.1.3/19-16
19.3.1.4/19-17
19.3.1.5/19-20
19.3.1.6/19-20
19.3.1.7/19-21
Section/Page
19.3.1.1/19-9
19.3.1.2/19-9
19.3.1.1/19-9
19.3.1.2/19-9
19.3.1.1/19-9
19.3.1.2/19-9
2
C3 base