MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 447

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

17.3.2.11 Fuse Bank 1 Protection (IIM_FBAC1) Register
The Fuse Bank 1 Protection (IIM_FBAC1) register corresponds to the first word in fuse bank 1, which
holds the fuse bank access protection information. The fuses associated with this register must be sensed
out when IIM come out of reset.
Reading these bits returns the fuse state (0 = unblown; 1 = blown) so long as IIM_FBAC1[FBRP]
is = (unblown). Disallowed reads always return 0 and cause ERR[RPE] to be set. Writing these bits
overrides the values without modifying the fuse elements. Overriding is allowed so long as
IIM_FBAC1[FBOP] = 0 (unblown). Disallowed attempts to override are ignored and cause ERR[OPE] to
be set. The corresponding fuse elements may be programmed (blown) using the fuse programming
sequence, so long as IIM_FBAC1[FBWP] = 0 (unblown). Disallowed attempts to program fuses are
ignored and cause ERR[WPE] to be set.
Figure 17-11
Freescale Semiconductor
Address: Base + 0xC00
Reset
Reset
FBESP
FBWP
FBOP
FBRP
FBSP
Field
W
W
R
R
16
0
0
0
0
0
shows the bits in the Status register.
Fuse Bank Write Protect. Controls whether this fuse bank (Fuse Bank 1) may be programmed.
0 (Unblown) = Fuse bank 1 may be programmed.
1 (Blown)
Fuse Bank Override Protect. Controls whether this fuse bank (Fuse Bank 1) may be overridden.
0 (Unblown) = Fuse bank 1 may be overridden.
1 (Blown)
Fuse Bank Read Protect. Controls whether this fuse bank (Fuse Bank 1) may be read.
0 (Unblown) = Fuse bank 1 may be read by software.
1 (Blown)
Fuse Banks Explicit Sense Protect. Controls whether this fuse bank (Fuse Bank 1) may be explicitly sensed.
The state of this fuse controls whether the IIM state machine allow explicit sense cycles (normal, 0-stress, or
1-stress).
0 (Unblown) = Fuse bank 1 may be explicitly sensed by software.
1 (Blown)
17
0
0
0
0
1
18
0
0
0
0
2
Figure 17-11. Fuse Bank 1 Protection (IIM_FBAC1) Register
= Fuse bank 1 may not be programmed (it is write-protected).
= Fuse bank 1 may not be overridden (it is override-protected).
= Fuse bank 1 may not be read by software (it is read-protected).
= Fuse bank 1 may not be explicitly sensed by software (it is sense-protected).
19
0
0
0
0
3
MPC5125 Microcontroller Reference Manual, Rev. 2
Table 17-12. IIM_FBAC1 field descriptions
20
4
0
0
0
0
21
0
0
0
0
5
22
0
0
0
0
6
Table 17-12
23
0
0
0
0
7
Description
FBWP FBOP FBRP FBSP
—
24
8
0
0
describes the bit fields.
—
25
9
0
0
—
10
26
0
0
—
11
27
0
0
Access: Supervisor read/write
ESP
FB
—
12
28
0
0
—
13
29
0
0
0
—
14
30
IIM/Fusebox
0
0
0
17-11
—
15
31
0
0
0