MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 731

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

receiver and transmitter operation of a remote channel. For this mode, the transmitter uses the receiver
clock.
Because the receiver is not active, received data cannot be read by the CPU and error status conditions are
inactive. Received parity is not checked and is not recalculated for transmission. Stop bits are sent as they
are received. A received break is echoed as received until the next valid start bit is detected.
25.5.6
Setting MR1[PM] programs the PSC to operate in a walk-up mode for multidrop or multiprocessor
applications. In this mode, a master can transmit an address character followed by a block of data
characters targeted for one of as many as 256 slave stations.
Although slave stations have their channel receivers disabled, they continuously monitor the masters data
stream. When the master sends an address character, the slave receiver channel notifies its respective CPU
by setting SRand generating an interrupt (if programmed to do so). Each slave station CPU then compares
the received address to its station address and enables its receiver if it wishes to receive the subsequent
data characters or block of data from the master station. Slave stations not addressed continue monitoring
the data stream. Data fields in the data stream are separated by an address character. After a slave receives
a block of data, its CPU disables the receiver and repeats the process.
Figure 25-56
Freescale Semiconductor
Multidrop Mode
shows functional timing information for multidrop mode.
CPU
MPC5125 Microcontroller Reference Manual, Rev. 2
Disabled
Disabled
Figure 25-55. Remote Loop-Back
Rx
Tx
Disabled
Disabled
RxD Input
TxD Input
Programmable Serial Controller (PSC)
25-53