MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 606

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

MSCAN
Write: For transmit buffers, anytime when TXEx flag is set (see
Flag Register
Section 22.3.2.11, “MSCAN Transmitter Buffer Selection
buffers.
Reset: Undefined because of RAM-based implementation.
22.3.3.1
The identifier registers for an extended format identifier consist of a total of 32 bits; ID[28:0], SRR, IDE,
and RTR bits. The identifier registers for a standard format identifier consist of a total of 13 bits; ID[10:0],
RTR, and IDE bits.
22.3.3.1.1
1
22-28
Reset value is indeterminate.
ID[28:21]
Address: Base + 0x40 (RX)
Field
Reset
IDR0
IDR1
0x00
0x01
Address: Base + 0x40 (RX)
W
R
1
Base + 0x60 (TX)
Extended Format Identifier. The identifiers consist of 29 bits (ID[28:0]) for the extended format. ID28 is the most
significant bit and is transmitted first on the CAN bus during the arbitration procedure. The priority of an identifier
is defined to be highest for the smallest binary number.
Identifier Registers (IDR0–IDR3)
Figure 22-21. Receive/Transmit Message Buffer — Standard Identifier Mapping
(CANTFLG)”) and the corresponding transmit buffer is selected in CANTBSEL (see
Base + 0x60 (TX)
W
W
ID28
R
R
IDR0–IDR3 for Extended Identifier Mapping
—
0
Figure 22-22. Identifier Register 0 (IDR0)— Extended Identifier Mapping
ID10
ID2
0
Table 22-22. IDR0 Field Descriptions—Extended Mapping
ID27
—
1
MPC5125 Microcontroller Reference Manual, Rev. 2
ID9
ID1
1
ID26
—
2
ID8
ID0
2
ID25
—
3
Description
RTR
ID7
3
(CANTBSEL)”). Unimplemented for receive
ID24
—
IDE (=0)
4
Section 22.3.2.7, “MSCAN Transmitter
ID6
4
ID23
—
5
ID5
5
Freescale Semiconductor
Access: User read/write
ID22
—
6
ID4
6
ID21
ID3
—
7
7