MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 293

IC MCU 32BIT E300 324TEPBGA

MPC5125YVN400

Manufacturer Part Number
MPC5125YVN400
Description
IC MCU 32BIT E300 324TEPBGA
Manufacturer
Freescale Semiconductor
Series
MPC51xxr

Specifications of MPC5125YVN400

Core Processor
e300
Core Size
32-Bit
Speed
400MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, USB OTG
Peripherals
DMA, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.33 V ~ 1.47 V
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
324-PBGA
Processor Series
MPC51xx
Core
e300
Data Bus Width
32 bit
Development Tools By Supplier
TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
Maximum Clock Frequency
400 MHz
Operating Supply Voltage
1.4 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Data Ram Size
32 KB
I/o Voltage
3.3 V
Interface Type
CAN, I2C
Minimum Operating Temperature
- 40 C
Program Memory Size
32 bit
Cpu Speed
400MHz
Embedded Interface Type
CAN, I2C, SPI, UART, USB
Digital Ic Case Style
TEPBGA
No. Of Pins
324
Rohs Compliant
Yes
Cpu Family
MPC5xx
Device Core Size
32b
Frequency (max)
400MHz
Total Internal Ram Size
32KB
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
324
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC5125YVN400
Manufacturer:
Freescale Semiconductor
Quantity:
135
Part Number:
MPC5125YVN400
Manufacturer:
LTC
Quantity:
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Part Number:
MPC5125YVN400
Manufacturer:
Freescale Semiconductor
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10.4.2.5
Figure 10-38
describes the area of interest offset fields.
10.4.2.6
Figure 10-39
Table 10-34
Freescale Semiconductor
Address: Base + 0xD8
Address: Base + 0xDC
OFFSET_YI
OFFSET_XI
DELTA_XI
Reset
Reset
Reset
Reset
Field
Field
W
W
W
W
R
R
R
R
16
16
0
0
0
0
0
0
0
0
0
0
describes the display offset fields.
Area Descriptor Word 4–AOI Offset
shows the fields of AD Word 4, which defines the offset for the area of interest.
Area Descriptor Word 5–Display Offset
shows the fields of AD Word 5, which defines the offset for the area of interest in the display.
Table 10-32. Area Descriptor Word 3
The
The YI parameter that defines the vertical offset (in pixels) of the area of interest from the start of the source
bitmap in memory.
The XI parameter that defines the horizontal offset (in pixels) of the area of interest from the start of the source
bitmap in memory.
17
17
0
0
0
0
0
0
0
0
1
1
Δ
Table 10-33. Area Descriptor Word 4
XI parameter that defines the horizontal size (in pixels) of the area of interest.
18
18
0
0
0
0
0
0
0
0
2
2
Figure 10-39. Area Descriptor Word 5
Figure 10-38. Area Descriptor Word 4
19
19
0
0
0
0
0
0
0
0
3
3
MPC5125 Microcontroller Reference Manual, Rev. 2
20
20
4
0
0
0
0
4
0
0
0
0
21
21
0
0
0
0
0
5
5
22
22
0
0
0
0
0
6
6
AOI Size field descriptions (continued)
23
23
0
0
0
0
0
7
7
Description
Description
AOI Offset field descriptions
24
24
8
0
0
8
0
0
0
Display Offset
25
25
9
0
0
9
0
0
0
OFFSET_YD
OFFSET_XD
AOI Offset
OFFSET_YI
OFFSET_XI
10
26
10
26
0
0
0
0
0
11
27
11
27
0
0
0
0
0
12
28
12
28
0
0
0
0
0
Display Interface Unit (DIU)
Access: User read-only
Access: User read-only
13
29
13
29
0
0
0
0
0
Table 10-33
14
30
14
30
0
0
0
0
0
10-31
15
31
15
31
0
0
0
0
0

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