MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 550

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

LocalPlus Bus Controller (LPC)
21.2.1.1.5
21-10
Address: Base + 0x028
Reset
Reset
CSxerr
WOerr
BWE7
ROerr
BRE7
SLB7
Field
Field
CW7
W
W
R
R
CW7 SLB7 BWE7 BRE7 CW6 SLB6 BWE6 BRE6 CW5 SLB5 BWE5 BRE5 CW4 SLB4 BWE4 BRE4
CW3 SLB3 BWE3 BRE3 CW2 SLB2 BWE2 BRE2 CW1 SLB1 BWE1 BRE1 CW0 SLB0 BWE0 BRE0
16
0
0
0
Chip Select Burst Control (LPC_CSBC) Register
Write-Only Error. If 1, it indicates a read access was attempted on a device marked as write-only.
This is a sticky bit and must be written with 1 to be cleared. This status bit is always active, regardless of the
bus error enable bit. The CS number that relates to the error is reflected in the CSxerr field. An interrupt is also
generated if the IE bit is set.
Read-Only Error. If 1, it indicates a write access was attempted on a device marked as read-only.
This is a sticky bit and must be written with 1 to be cleared. This status bit is always active, regardless of the
bus error enable bit. The CS number that relates to the error is reflected in the CSxerr field. An interrupt is also
generated if the IE bit is set.
Chip select error that indicates CS number associated with last Write-Only or Read-Only Error, as long as only
one error type happens (write- or read-only). When the other type is happening, CSxerr points to the first
violating CS of the opposite type. This is the case until one of the Error flags gets cleared.
Chip select 7 cache wrap-capable; set if a device burst can perform PPC cache wrap.
Note: Cache wrap means the external device supports a wrap-around mechanism at addresses 0x20, 0x40,
Chip select 7 short/long burst; set 0 for short burst only, 1 for long burst-capable. Short burst are limited to 8
bytes, used for instruction fetches. Long burst-capable means the device can do a 16-, 24-, 32-, 40-, 48-, or
56-byte burst. The length of the burst depends on the amount of data which should be transferred at once.
Chip select 7 burst write enable; set 1 to enable device bursting for a given chip select. This bit must be set to
enable any bursting writes.
Chip select 7 burst read enable, 1 to enable device bursting for given chip select. Must be set to enable
bursting reads.
17
0
0
1
0x60,... and so on.
For example, 0x8-0xC-0x10-0x14-0x18-0x1C-0x0-0x4.
Figure 21-6. Chip Select Burst Control (LPC_CSBC) Register
18
0
0
2
19
0
0
3
MPC5125 Microcontroller Reference Manual, Rev. 2
Table 21-7. LPC_CSBC field descriptions
Table 21-6. LPC_CSS field descriptions
20
4
0
0
21
0
0
5
22
0
0
6
23
0
0
7
Description
Description
24
8
0
0
25
9
0
0
10
26
0
0
11
27
0
0
12
28
0
0
Freescale Semiconductor
Access: User read/write
13
29
0
0
14
30
0
0
15
31
0
0