MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 255

IC MCU 32BIT E300 324TEPBGA

MPC5125YVN400

Manufacturer Part Number
MPC5125YVN400
Description
IC MCU 32BIT E300 324TEPBGA
Manufacturer
Freescale Semiconductor
Series
MPC51xxr

Specifications of MPC5125YVN400

Core Processor
e300
Core Size
32-Bit
Speed
400MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, USB OTG
Peripherals
DMA, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.33 V ~ 1.47 V
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
324-PBGA
Processor Series
MPC51xx
Core
e300
Data Bus Width
32 bit
Development Tools By Supplier
TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
Maximum Clock Frequency
400 MHz
Operating Supply Voltage
1.4 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Data Ram Size
32 KB
I/o Voltage
3.3 V
Interface Type
CAN, I2C
Minimum Operating Temperature
- 40 C
Program Memory Size
32 bit
Cpu Speed
400MHz
Embedded Interface Type
CAN, I2C, SPI, UART, USB
Digital Ic Case Style
TEPBGA
No. Of Pins
324
Rohs Compliant
Yes
Cpu Family
MPC5xx
Device Core Size
32b
Frequency (max)
400MHz
Total Internal Ram Size
32KB
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
324
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC5125YVN400
Manufacturer:
Freescale Semiconductor
Quantity:
135
Part Number:
MPC5125YVN400
Manufacturer:
LTC
Quantity:
29
Part Number:
MPC5125YVN400
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
A group priority error is global and any request in any group causes a group priority error.
In general, if priority levels are not unique, the highest (channel/group) priority with an active request is
selected, but the lowest numbered (channel/group) with that priority is selected by arbitration and executed
by the DMA_ENGINE. The hardware service request handshake signals, error interrupts, and error
reporting is associated with the selected channel.
9.3.3
9.3.3.1
In this mode, the channel service request from the highest priority channel in the highest priority group is
selected to execute. If the DMA is programmed so the channels within one group use fixed priorities and
that group is assigned the highest fixed priority of all groups, that group may take all the bandwidth of the
DMA controller. No other groups are serviced if there is always at least one DMA request pending on a
channel in the highest priority group when the controller arbitrates the next DMA request.
The advantage of this scenario is that latency can be small for channels that need to be serviced quickly.
Preemption is available in this scenario only.
9.3.3.2
The occurrence of one or more DMA requests from one or more groups, the channel with the highest
priority from a specific group is serviced first. Groups are serviced starting with the highest group number
with a service request and rotating through to the lowest group number containing a service request.
After the channel request is serviced, the group round robin algorithm selects the highest pending request
from the next group in the round robin sequence. Servicing continues round robin, always servicing the
highest priority channel in the next group in the sequence or skipping a group if it has no pending requests.
If a channel requests service at a rate that equals or exceeds the round robin service rate, that channel is
always serviced before lower priority channels in the same group. Therefore, the lower priority channels
are never serviced.
The advantage of this scenario is that no one group consumes all the DMA bandwidth.
The highest priority channel selection latency is potentially greater than fixed/fixed arbitration.
Excessive request rates on high priority channels could prevent the servicing of lower priority channels in
the same group.
Freescale Semiconductor
5. After all of Group3 requests have completed, Group2 is the next active group.
6. If Group2 has a service request, an undefined channel in Group2 is selected and a channel priority
7. This repeats until the all of the Group2 requests have been removed or a higher priority Group3
error occurs.
request comes in.
DMA Arbitration Mode Considerations
Fixed Group Arbitration, Fixed Channel Arbitration
Round Robin Group Arbitration, Fixed Channel Arbitration
MPC5125 Microcontroller Reference Manual, Rev. 2
Direct Memory Access (DMA)
9-35

Related parts for MPC5125YVN400