MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 543

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

21.2
Freescale Semiconductor
(0xFF41_0100)
0x03C–0x0FF Reserved
0x124–0x13F
0x150–0x1FF
Offset from
LPC_BASE
0x00C
0x01C
0x02C
0x10C
0x11C
0x14C
0x000
0x004
0x008
0x010
0x014
0x018
0x020
0x024
0x028
0x030
0x034
0x038
0x100
0x104
0x108
0x110
0x114
0x118
0x120
0x140
0x144
0x148
Memory Map and Register Definition
1
Chip Select 0/Boot Configuration Register (LPC_CS0BOOTC)
Chip Select 1 Configuration Register (LPC_CS1C)
Chip Select 2 Configuration Register (LPC_CS2C)
Chip Select 3 Configuration Register (LPC_CS3C)
Chip Select 4 Configuration Register (LPC_CS4C)
Chip Select 5 Configuration Register (LPC_CS5C)
Chip Select 6 Configuration Register (LPC_CS6C)
Chip Select 7 Configuration Register (LPC_CS7C)
Chip Select Control Register (LPC_CSC)
Chip Select Status Register (LPC_CSS)
Chip Select Burst Control (LPC_CSBC)
Chip Select Deadcycle Control Register (LPC_CSDC)
Chip Select Holdcycle Control Register (LPC_CSHC)
Address Latch Timing Register (LPC_ALTR)
TSIZ and TS Enable Register (LPC_TTE)
SCLPC Packet Size Register (LPC_SCLPC_PS)
SCLPC Start Address Register (LPC_SCLPC_SA)
SCLPC Control Register (LPC_SCLPC_C)
SCLPC Enable Register (LPC_SCLPC_E)
Reserved
SCLPC Status Register (LPC_SCLPC_S)
SCLPC Bytes Done Register (LPC_SCLPC_BD)
EMB Share Counter Register (LPC_EMB_SC)
EMB Pause Control Register (LPC_EMB_PC)
Reserved
LPC RX/TX FIFO Data Word Register (LPC_SCLPC_FIFOD)
LPC RX/TX FIFO Status Register (LPC_SCLPC_FIFOS)
LPC RX/TX FIFO Control Register (LPC_SCLPC_FIFOC)
LPC RX/TX FIFO Alarm Register (LPC_SCLPC_FIFOA)
Reserved
MPC5125 Microcontroller Reference Manual, Rev. 2
Table 21-2. LPC Block Memory Map
Register
General Registers
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
2
0x0020_UUU1
0x0000_000U
Reset Value
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x3333_3333
0x3333_3333
0x0000_0000
0x0000_0000
0x0000_0000
0x0001_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0010_0000
0x0000_0000
0x0001_0000
0x0100_0000
0x0000_0000
LocalPlus Bus Controller (LPC)
—
4
3
21.2.1.1.5/21-10
21.2.1.1.6/21-11
21.2.1.1.7/21-12
21.2.1.1.8/21-12
21.2.1.1.9/21-13
21.2.1.2.1/21-14
21.2.1.2.2/21-15
21.2.1.2.3/21-15
21.2.1.2.4/21-16
21.2.1.2.5/21-17
21.2.1.2.6/21-17
21.2.1.2.7/21-18
21.2.1.2.8/21-18
21.2.1.3.1/21-19
21.2.1.3.2/21-20
21.2.1.3.3/21-21
21.2.1.3.4/21-21
21.2.1.1.1/21-4
21.2.1.1.2/21-7
21.2.1.1.2/21-7
21.2.1.1.2/21-7
21.2.1.1.2/21-7
21.2.1.1.2/21-7
21.2.1.1.2/21-7
21.2.1.1.2/21-7
21.2.1.1.3/21-9
21.2.1.1.4/21-9
Section/Page
21-3