MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 861

IC MCU 32BIT E300 324TEPBGA

MPC5125YVN400

Manufacturer Part Number
MPC5125YVN400
Description
IC MCU 32BIT E300 324TEPBGA
Manufacturer
Freescale Semiconductor
Series
MPC51xxr

Specifications of MPC5125YVN400

Core Processor
e300
Core Size
32-Bit
Speed
400MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, USB OTG
Peripherals
DMA, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.33 V ~ 1.47 V
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
324-PBGA
Processor Series
MPC51xx
Core
e300
Data Bus Width
32 bit
Development Tools By Supplier
TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
Maximum Clock Frequency
400 MHz
Operating Supply Voltage
1.4 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Data Ram Size
32 KB
I/o Voltage
3.3 V
Interface Type
CAN, I2C
Minimum Operating Temperature
- 40 C
Program Memory Size
32 bit
Cpu Speed
400MHz
Embedded Interface Type
CAN, I2C, SPI, UART, USB
Digital Ic Case Style
TEPBGA
No. Of Pins
324
Rohs Compliant
Yes
Cpu Family
MPC5xx
Device Core Size
32b
Frequency (max)
400MHz
Total Internal Ram Size
32KB
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
324
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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MPC5125YVN400
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32.2.4.13 ULPI Viewport (USB_ULPIVIEWPORT) Register
The ULPI Viewport (USB_ULPIVIEWPORT) register provides indirect access to the ULPI PHY register
set. Although the core performs access to the ULPI PHY register set, extraordinary circumstances may
exist where software may need direct access.
Freescale Semiconductor
TXSCHHEALTH Scheduler Health Counter. These bits increment when the OTG controller fails to fill the TX latency FIFO to
TXFIFOTHRES FIFO Burst Threshold. This register controls the number of data bursts posted to the TX latency FIFO in host
Address: Base + 0x164
TXSCHOH
Reset
Reset
Field
W
W
R
R
16
0
0
0
0
0
Figure 32-26. Transmit FIFO Tuning Controls (USB_TXFILLTUNING) Register
mode before the packet begins on to the bus. The minimum value is two and this value should be as low as
possible to maximize USB performance. A higher value can be used in systems with unpredictable latency
and/or insufficient bandwidth where the FIFO may underrun because the data transferred from the latency
FIFO to USB occurs before it can be replenished from system memory. This value is ignored if the stream
disable bit in USB_USBMODE register is set.
the level programmed by TXFIFOTHRES before running out of time to send the packet before the next
Start-Of-Frame.
This health counter measures the number of times this occurs to provide feedback to selecting a proper
TXSCHOH. Writing to this register clears the counter.
Scheduler Overhead. These bits add an additional fixed offset to the schedule time estimator described above
as T
captured in the TXSCHHEALTH to less than 10 per second in a highly utilized bus. Choosing a value too high
for this register is not desired as it can needlessly reduce USB utilization.
The time unit represented in this register is 1.267 μs when a device is connected in high-speed mode.
The time unit represented in this register is 6.333 μs when a device is connected in low/full-speed mode.
For most applications, TXSCHOH can be set to 4 or less. A good value to begin with is:
TXFIFOTHRES × (BURSTSIZE × 4 bytes-per-word)/(40 × TimeUnit), always rounded to the next higher
integer. TimeUnit is either 1.267 or 6.333 as noted earlier in this description. For example, if TXFIFOTHRES
is 5 and BURSTSIZE is 8, set TXSCHOH to 5 × (8 × 4)/(40 × 1.267) = 4 for a high-speed link. If this value of
TXSCHOH results in a TXSCHHEALTH count of 0 per second, try lowering the value by 1 if optimizing
performance is desired. If TXSCHHEALTH exceeds 10 per second, try raising the value by 1.
If streaming mode is disabled via the USB_USBMODE register, treat TXFIFOTHRES as the maximum value
for purposes of the TXSCHOH calculation.
17
0
0
0
0
1
ff
. As an approximation, the value chosen for this register should limit the number of back-off events
18
0
0
0
0
2
Table 32-27. USB_TXFILLTUNING field descriptions
19
0
0
0
3
MPC5125 Microcontroller Reference Manual, Rev. 2
20
TXSCHHEALTH
4
0
0
0
w1c
21
0
0
0
5
22
0
0
0
6
23
0
0
0
7
Description
24
8
0
0
0
0
25
9
0
0
0
Universal Serial Bus Interface with On-The-Go
10
26
0
0
11
27
0
0
TXSCHOH
TXFIFOTHRES
12
28
0
0
Access: User read/write
13
29
0
0
14
30
0
0
32-33
15
31
0
0

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