MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 610

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

MSCAN
1
22.3.3.3
The Data Length Register (DLR) keeps the data length field of the CAN frame.
1
22.3.3.4
This register defines the local priority of the associated message buffer. The local priority is used for the
internal prioritization process of the MSCAN and is defined to be highest for the smallest binary number.
The MSCAN implements the following internal prioritization mechanisms:
22-32
Reset value is indeterminate.
Reset value is indeterminate.
DLC[3:0]
Address: Base + 0x58 (RX)
DB[7:0]
Field
Field
•
•
Reset
3:0
All transmission buffers with a cleared TXEx flag participate in the prioritization immediately
before the SOF (start of frame) is sent.
The transmission buffer with the lowest local priority field wins the prioritization.
W
R
1
Base + 0x78 (TX)
Data bits 7:0
Data Length Code Bits. The data length code contains the number of bytes (data byte count) of the respective
message. During the transmission of a remote frame, the data length code is transmitted as programmed while
the number of transmitted data bytes is always 0. The data byte count ranges from 0 to 8 for a data frame, as
follows:
0000 0 data bytes.
0001 1 data byte.
0010 2 data bytes.
0011 3 data bytes.
0100 4 data bytes.
0101 5 data bytes.
0110 6 data bytes.
0111 7 data bytes.
1000 8 data bytes.
All other values are reserved.
Data Length Register (DLR)
Transmit Buffer Priority Register (TBPR)
—
0
Figure 22-29. Data Length Register (DLR)—Extended Identifier Mapping
—
1
MPC5125 Microcontroller Reference Manual, Rev. 2
Table 22-28. DSR0–DSR7 field descriptions
Table 22-29. DLR field descriptions
—
2
—
3
Description
Description
DLC3
—
4
DLC2
—
5
Freescale Semiconductor
Access: User read/write
DLC1
—
6
DLC0
—
7