MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 865

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

32.2.4.16 Configure Flag (USB_CONFIGFLAG) Register
A read from the Configure Flag (USB_CONFIGFLAG) register returns a constant of 0x0000_0001 to
indicate all port routings default to this host controller. This EHCI register is not used in this
implementation.
32.2.4.17 Port Status and Control Registers (PORTSCn)
The OTG module has one port status and control register. The number of port registers implemented by a
particular instantiation of a host controller is documented in the USB_HCSPARAMS register. Software
uses this information as an input parameter to determine how many ports need service. This register is only
reset when power is initially applied or in response to a controller reset. The initial conditions of a port are:
If the port has port power control, this state remains until software applies power to the port by setting port
power bit to one.
For the OTG module in device mode, the OTG controller does not support power control. Port control in
device mode is only for status port reset, suspend, and current connect status. It also initiates test mode or
forces signaling and allows software to put the PHY into low-power suspend mode and disable the PHY
clock.
Freescale Semiconductor
•
•
Address: Base + 0x180
Field
—
Reset
Reset
No device connected
Port disabled
W
W
R
R
16
0
0
0
0
0
Reserved. (0x0000_0001, all port routings default to this host)
17
0
0
0
0
1
Figure 32-30. Configure Flag (USB_CONFIGFLAG) Register
18
0
0
0
0
2
Table 32-31. USB_CONFIGFLAG field descriptions
MPC5125 Microcontroller Reference Manual, Rev. 2
19
0
0
0
0
3
20
0
0
0
0
4
21
0
0
0
0
5
22
6
0
0
0
0
23
0
0
0
0
7
Description
24
0
0
0
0
8
25
0
0
0
0
9
Universal Serial Bus Interface with On-The-Go
10
26
0
0
0
0
11
27
0
0
0
0
12
28
Access: User read-only
0
0
0
0
13
29
0
0
0
0
14
30
0
0
0
0
15
31
0
0
1
1
32-37