MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 387

IC MCU 32BIT E300 324TEPBGA

MPC5125YVN400

Manufacturer Part Number
MPC5125YVN400
Description
IC MCU 32BIT E300 324TEPBGA
Manufacturer
Freescale Semiconductor
Series
MPC51xxr

Specifications of MPC5125YVN400

Core Processor
e300
Core Size
32-Bit
Speed
400MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, USB OTG
Peripherals
DMA, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.33 V ~ 1.47 V
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
324-PBGA
Processor Series
MPC51xx
Core
e300
Data Bus Width
32 bit
Development Tools By Supplier
TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
Maximum Clock Frequency
400 MHz
Operating Supply Voltage
1.4 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Data Ram Size
32 KB
I/o Voltage
3.3 V
Interface Type
CAN, I2C
Minimum Operating Temperature
- 40 C
Program Memory Size
32 bit
Cpu Speed
400MHz
Embedded Interface Type
CAN, I2C, SPI, UART, USB
Digital Ic Case Style
TEPBGA
No. Of Pins
324
Rohs Compliant
Yes
Cpu Family
MPC5xx
Device Core Size
32b
Frequency (max)
400MHz
Total Internal Ram Size
32KB
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
324
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Part Number
Manufacturer
Quantity
Price
Part Number:
MPC5125YVN400
Manufacturer:
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Quantity:
135
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14.3.5.24 Beginning of Transmit Descriptor Ring (ETH_X_DES_START) Register
The Beginning of Transmit Descriptor Ring (ETH_X_DES_START) register is a pointer to the start of the
circular transmit buffer descriptor queue in external memory. This pointer must be 32-bit aligned, write
bits 30 and 31 to 0. It is strongly recommended to be quad word-aligned (evenly divisible by 16) to get
better system performance; write bits 28, 29, 30, and 31 to 0.
This register is not reset and must be initialized prior to operation.
Freescale Semiconductor
Address: Base + 0x180
Address: Base + 0x184
X_DES_START This is a pointer to the start of the transmit buffer descriptor queue.
R_DES_START This is a pointer to the start of the receive buffer descriptor queue.
Reset
Reset
Reset
Reset
Field
Field
W
W
W
W
R
R
R
R
16
16
0
0
Figure 14-25. Beginning of Transmit Descriptor Ring (ETH_X_DES_START) Register
Figure 14-24. Beginning of Receive Descriptor Ring (ETH_R_DES_START) Register
17
17
1
1
18
18
2
2
Table 14-28. ETH_R_DES_START field descriptions
Table 14-29. ETH_X_DES_START field descriptions
19
19
3
3
MPC5125 Microcontroller Reference Manual, Rev. 2
20
20
4
4
21
21
5
5
R_DES_START
X_DES_START
22
22
6
6
R_DES_START
X_DES_START
23
23
7
7
Description
Description
24
24
8
8
25
25
9
9
10
26
10
26
11
27
11
27
Fast Ethernet Controller (FEC)
12
28
12
28
Access: User read/write
Access: User read/write
13
29
13
29
14
30
14
30
0
0
0
0
14-31
15
31
15
31
0
0
0
0

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