MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 732

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Programmable Serial Controller (PSC)
A character sent from the master station consists of:
A/D polarity is selected through MR1[PT]. MR1 should be programmed before enabling the transmitter
and loading the corresponding data bits into the Tx buffer.
In multidrop mode, the receiver continuously monitors the received data stream, regardless of whether it
is enabled or disabled.
25-54
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•
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Transmitter
A start bit
A programmed number of data bits
An address/data (A/D) bit flag
— A/D=1 indicates an address character
— A/D=0 indicates a data character
A programmed number of stop bits
If the receiver is disabled, it sets the RxRDY bit and loads the character into the receiver holding
register FIFO stack, provided the received A/D bit is 1 (address tag). If the received A/D bit is 0
(data tag), the character is discarded.
Receiver
Enabled
Enabled
RxRDY
Internal
Module
Internal
TxRDY
Module
Select
Select
RxD
TxD
MR1n[PM] = 11
MR1n[PT] = 1
MR1n[PM] = 11
MR1n[PM] = 11
A/D
ADD 1
0
Figure 25-56. Timing Diagram—Multidrop Mode
MPC5125 Microcontroller Reference Manual, Rev. 2
MR1n[PT] = 0
ADD1
ADD1
A/D
A/D
C0
1
1
ADD 1
Peripheral Station
C0
C0
Master Station
A/D
A/D
Status Data
MR1n[PT] = 2
(C0)
ADD 2
ADD2
ADD2
A/D
A/D
1
1
Freescale Semiconductor
Status Data
(ADD 2)
A/D
0