MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 1041

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Freescale Semiconductor
from Module Base
Address Offset
0x0064–0x0FFF
0x002–0x003
0x00A
0x00B
0x00C
0x00D
0x00E
0x000
0x001
0x004
0x005
0x006
0x007
0x008
0x009
0x00F
0x010
0x011
0x012
0x013
MPC5125 Microcontroller Reference Manual, Rev. 2, Release Candidate
Reserved
IO_CTL_MEM—MEM pad control register
IO_CTL_GBOBE—Global Output Enable Control
Register
Reserved
IO_CTL_LPC_CLK—LPC_CLK pad control register
(STD_PU)
IO_CTL_LPC_OE_B— PC_OE_B pad control register
(STD_PU)
IO_CTL_LPC_RWB—LPC_RWB pad control register
(STD_PU)
IO_CTL_LPC_CS0_B—LPC_CS0_B pad control register
(STD_PU)
IO_CTL_LPC_ACK_B—LPC_ACK_B pad control
register (STD_PU)
IO_CTL_LPC_AX03—LPC_AX03 pad control register
(STD_PU)
IO_CTL_EMB_AX02—EMB_AX02 pad control register
(STD_PU)
IO_CTL_EMB_AX01—EMB_AX01 pad control register
(STD_PU)
IO_CTL_EMB_AX00—EMB_AX00 pad control register
(STD_PU)
IO_CTL_EMB_AD31—EMB_AD31 pad control register
(STD_PU_ST)
IO_CTL_EMB_AD30—EMB_AD30 pad control register
(STD_PU_ST)
IO_CTL_EMB_AD29—EMB_AD29 pad control register
(STD_PU)
IO_CTL_EMB_AD28—EMB_AD28 pad control register
(STD_PU)
IO_CTL_EMB_AD27—EMB_AD27 pad control register
(STD_PU)
IO_CTL_EMB_AD26—EMB_AD26 pad control register
(STD_PU)
IO_CTL_EMB_AD25—EMB_AD25 pad control register
(STD_PU)
Table A-2. MPC5125 Detailed Register Map (continued)
I/O Control 0xFF40_A000
Chapter 20, “I/O Control”
Register
2
Access Reset Value
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0x1B
0x1B
0x00
0x00
0x03
0x03
0x03
0x03
0x03
0x03
0x03
0x03
0x03
0x00
0x00
0x00
0x00
0x00
1
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20.2.2.3.1/20-8
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20.2.2.3.2/20-8
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Section/Page
20.2.2.1/20-6
20.2.2.2/20-7
20.2.2.3/20-7
Memory Map
A-37