MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 256

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Direct Memory Access (DMA)
9.3.3.3
Groups are serviced as described in section
Channel Arbitration,”
serviced from each requesting group for each round robin pass through the groups.
Within each group, channels are serviced starting with the highest channel number and rotating through to
the lowest channel number without regard to channel priority levels.
Because channels are serviced in round robin manner, any channel that generates DMA requests faster than
a combination of the group round robin service rate and the channel service rate for its group does not
prevent the servicing of other channels in its group. Any DMA requests not serviced are simply lost, but
at least one channel is serviced.
This scenario ensures all channels are guaranteed service at some point, regardless of the request rates.
However, the potential latency could be quite high.
All channels are treated equally. Priority levels are not used in round robin mode.
9.3.3.4
The highest priority group with a request is serviced. Lower priority groups are serviced if no pending
requests exist in the higher priority groups.
Within each group, channels are serviced starting with the highest channel number and rotating through to
the lowest channel number without regard to the channel priority levels assigned within the group.
This scenario could cause the same bandwidth consumption problem as indicated in section
Section 9.3.3.1, “Fixed Group Arbitration, Fixed Channel Arbitration,”
priority group are serviced.
Service latency is short on the highest priority group, but could potentially become longer as the group
priority decreases.
9.3.4
9.3.4.1
To perform a single transfer of n bytes of data with one activation, set the major loop to one
(TCD.CITER = TCD.BITER = 1). The data transfer begins after the channel service request is
acknowledged and the channel is selected to execute. After the transfer is complete, the TCD.DONE bit is
set and an interrupt is generated if properly enabled.
For example, the following TCD entry is configured to transfer 16 bytes of data. The DMA is programmed
for one iteration of the major loop transferring 16 bytes per iteration. The source memory has a byte wide
memory port located at 0x1000. The destination memory has a word wide port located at 0x2000. The
address offsets are programmed in increments to match the size of the transfer; one byte for the source and
four bytes for the destination. The final source and destination addresses are adjusted to return to their
beginning values.
9-36
TCD.citer =TCD.biter = 1
DMA Transfer
Round Robin Group Arbitration, Round Robin Channel Arbitration
Fixed Group Arbitration, Round Robin Channel Arbitration
Single Request
but channels are serviced in channel number order this time. Only one channel is
MPC5125 Microcontroller Reference Manual, Rev. 2
Section 9.3.3.2, “Round Robin Group Arbitration, Fixed
but all the channels in the highest
Freescale Semiconductor