MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 521

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Freescale Semiconductor
IOCONTROL_BASE
(0xFF40_A000)
Offset from
0x02A
0x02B
0x02C
0x02D
0x02E
0x03A
0x03B
0x03C
0x03D
0x03E
0x028
0x029
0x02F
0x030
0x031
0x032
0x033
0x034
0x035
0x036
0x037
0x038
0x039
0x03F
0x040
0x041
0x042
0x043
0x044
0x045
0x046
1
IO_CTL_EMB_AD04—EMB_AD04 pad control register (STD_PU)
IO_CTL_EMB_AD03—EMB_AD03 pad control register (STD_PU)
IO_CTL_EMB_AD02—EMB_AD02 pad control register (STD_PU)
IO_CTL_EMB_AD01—EMB_AD01 pad control register (STD_PU)
IO_CTL_EMB_AD00—EMB_AD00 pad control register (STD_PU)
IO_CTL_NFC_CE0_B—NFC_CE0_B pad control register (STD_PU)
IO_CTL_NFC_RB—NFC_RB pad control register (STD_PU_ST)
IO_CTL_DIU_CLK—DIU_CLK pad control register (STD_PU)
IO_CTL_DIU_DE—DIU_DE pad control register (STD_PU)
IO_CTL_DIU_HSYNC—DIU_HSYNC pad control register (STD_PU)
IO_CTL_DIU_VSYNC—DIU_VSYNC pad control register (STD_PU)
IO_CTL_DIU_LD00—DIU_LD00 pad control register (STD_PU_ST)
IO_CTL_DIU_LD01—DIU_LD01 pad control register (STD_PU)
IO_CTL_DIU_LD02—DIU_LD02 pad control register (STD_PU)
IO_CTL_DIU_LD03—DIU_LD03 pad control register (STD_PU)
IO_CTL_DIU_LD04—DIU_LD04 pad control register (STD_PU)
IO_CTL_DIU_LD05—DIU_LD05 pad control register (STD_PU)
IO_CTL_DIU_LD06—DIU_LD06 pad control register (STD_PU)
IO_CTL_DIU_LD07—DIU_LD07 pad control register (STD_PU_ST)
IO_CTL_DIU_LD08—DIU_LD08 pad control register (STD_PU_ST)
IO_CTL_DIU_LD09—DIU_LD09 pad control register (STD_PU)
IO_CTL_DIU_LD10—DIU_LD10 pad control register (STD_PU)
IO_CTL_DIU_LD11—DIU_LD11 pad control register (STD_PU)
IO_CTL_DIU_LD12—DIU_LD12 pad control register (STD_PU)
IO_CTL_DIU_LD13—DIU_LD13 pad control register (STD_PU)
IO_CTL_DIU_LD14—DIU_LD14 pad control register (STD_PU)
IO_CTL_DIU_LD15—DIU_LD15 pad control register (STD_PU)
IO_CTL_DIU_LD16—DIU_LD16 pad control register (STD_PU_ST)
IO_CTL_DIU_LD17—DIU_LD17 pad control register (STD_PU_ST)
IO_CTL_DIU_LD18—DIU_LD18 pad control register (STD_PU)
IO_CTL_DIU_LD19—DIU_LD19 pad control register (STD_PU)
MPC5125 Microcontroller Reference Manual, Rev. 2
Table 20-1. I/O Control Memory Map
Register
2
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Value
0x1C
0x1C
0x1B
0x18
0x00
0x00
0x03
0x03
0x03
0x03
0x03
0x07
0x00
0x00
0x00
0x00
0x18
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x18
0x18
0x00
0x00
Section/Page
20.2.2.3.1/20-8
20.2.2.3.1/20-8
20.2.2.3.1/20-8
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20.2.2.3.1/20-8
20.2.2.3.1/20-8
20.2.2.3.2/20-8
20.2.2.3.1/20-8
20.2.2.3.1/20-8
20.2.2.3.1/20-8
20.2.2.3.1/20-8
20.2.2.3.2/20-8
20.2.2.3.1/20-8
20.2.2.3.1/20-8
20.2.2.3.1/20-8
20.2.2.3.1/20-8
20.2.2.3.1/20-8
20.2.2.3.1/20-8
20.2.2.3.2/20-8
20.2.2.3.2/20-8
20.2.2.3.1/20-8
20.2.2.3.1/20-8
20.2.2.3.1/20-8
20.2.2.3.1/20-8
20.2.2.3.1/20-8
20.2.2.3.1/20-8
20.2.2.3.1/20-8
20.2.2.3.2/20-8
20.2.2.3.2/20-8
20.2.2.3.1/20-8
20.2.2.3.1/20-8
I/O Control
20-3