MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 906

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Universal Serial Bus Interface with On-The-Go
32.5.7.2
The second doubleword of an FTSN node contains a link pointer to a queue head. If the T-bit in this pointer
is a zero, then this FSTN is a save-place indicator. Its Typ field must be set by software to indicate the target
data structure is a queue head. If the T-bit in this pointer is set, this FSTN is the restore indicator. When
the T-bit is a one, the host controller ignores the Typ field.
32.6
The general operational model is for the USB modules in host mode is defined by the enhanced host
controller interface (EHCI) specification. The EHCI specification describes the register-level interface for
a host controller for the USB Revision 2.0. It includes a description of the hardware/software interface
between system software and host controller hardware. Information concerning the initialization of the
USB modules is included in the following section; however, the full details of the EHCI specification are
beyond the scope of this document.
32-78
NPLP
BPLP
31:5
31:5
Typ
Typ
Bit
4:3
2:1
Bit
4:3
2:1
0
T
0
T
Host Operational Model
FSTN Back Path Link Pointer
Normal Path Link Pointer. This field contains the address of the next data object to be processed in the periodic
list and corresponds to memory address signals [31:5], respectively.
Reserved. These bits must be written as 0s.
This field indicates to the host controller whether the item referenced is an iTD/siTD, a QH, or an FSTN. This
allows the host controller to perform the proper type of processing on the item after it is fetched.
00 iTD (isochronous transfer descriptor)
01 QH (queue head)
10 siTD (split transaction isochronous transfer descriptor)
11 FSTN (Frame Span Traversal Node)
Terminate.
0 Link Pointer is valid.
1 Link Pointer field is not valid.
Back Path Link Pointer. This field contains the address of a queue head. This field corresponds to memory
address signals [31:5], respectively.
Reserved. These bits must be written as 0s.
Software must ensure this field is set to indicate the target data structure is a queue head (01). Any other value
in this field yields undefined results.
Terminate.
0 Link Pointer is valid (that is, the host controller may use bits [31:5] [in combination with the
1 Link Pointer field is not valid (that is, the host controller must not use bits [31:5] [in combination with the
CTRLDSSEGMENT register if applicable] as a valid memory address). This value also indicates that this
FSTN is a save-place indicator.
CTRLDSSEGMENT register if applicable] as a valid memory address). This value also indicates that this
FSTN is a restore indicator.
MPC5125 Microcontroller Reference Manual, Rev. 2
Table 32-67. FSTN Back Path Link Pointer
Table 32-66. FTSN Normal Path Pointer
Description
Description
Freescale Semiconductor