MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 517

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Freescale Semiconductor
from I2C_MDRn
Dummy Read
Switch To
Rx Mode
Y
Byte to I2C_MDRn
(Master Rx)
Transmitted
Addr Cycle
Write Next
Last Byte
RXAK=0
End Of
?
?
?
Y
N
N
TX
Stop Signal
Generate
Figure 19-16. Software Flowchart of Typical I
Y
N
Tx/Rx
Set TXAK = 1
?
Y
MPC5125 Microcontroller Reference Manual, Rev. 2
Byte to Be Read
from I2C_MDRn
Byte to Be Read
Second Last
Read Data
and Store
RX
Last
?
?
N
N
Stop Signal
Generate
Y
Y
RTI
Clear AL
Master
Mode
Clear
IF
?
to I2C_MDRn
Write Data
(Read)
Set TX
N
Mode
N
N
Y
from I2C_MDRn
Dummy Read
Clear AKF, AL
2
AAS = 1
AKF = 1
C Interrupt Routine
Set RX
SRW = 1
Y
Y
Mode
?
?
?
N
(Write)
Address
Transfer
Tx Next
Y
Byte
Y
Y
from I2C_MDRn
Dummy Read
ACK From
Arbitration
AAS = 1
Receiver
Switch to
Rx Mode
TX/RX
Lost
?
Inter-Integrated Circuit (I
?
?
?
N
N
N
TX
Data Transfer
from I2C_MDRn
Read Data
and Store
RX
19-25
2
C)