MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 582

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

MSCAN
22.3
The MPC5125 contains four independent MSCAN Controllers with identical register sets. The register
sets have different base addresses. However, the registers in each set have the same offsets with respect to
their base addresses.
22-4
MSCAN1: 0xFF40_1300
MSCAN2: 0xFF40_1380
MSCAN3: 0xFF40_2300
MSCAN4: 0xFF40_2380
MSCAN_BASE
Offset from
0x0A–0x0B
0x0E–0x0F
0x02–0x03
0x06–0x07
0x0C
0x0D
0x00
0x01
0x04
0x05
0x08
0x09
0x10
0x11
Memory Map and Register Definition
1
TXCAN
CAN_H
MSCAN Control Register 0 (CANCTL0)
MSCAN Control Register 1 (CANCTL1)
Reserved
MSCAN Bus Timing Register 0 (CANBTR0)
MSCAN Bus Timing Register 1 (CANBTR1)
Reserved
MSCAN Receiver Flag Register (CANRFLG)
MSCAN Receiver Interrupt Enable Register (CANRIER)
Reserved
MSCAN Transmitter Flag Register (CANTFLG)
MSCAN Transmitter Interrupt Enable Register (CANTIER)
Reserved
MSCAN Transmitter Message Abort Control (CANTARQ)
MSCAN Transmitter Message Abort Control (CANTAAK)
Power Architecture
CAN node 1
CAN Controller
MPC5125 Microcontroller Reference Manual, Rev. 2
(MSCAN)
Transceiver
Figure 22-2. MSCAN System
CAN_L
Table 2. FSL memory map
RXCAN
Register
CAN Bus
CAN node 2
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
CAN node n
R
2
Reset Value
0x11
0x00
0x00
0x00
0x00
0x07
0x00
0x00
0x01
0x00
Freescale Semiconductor
22.3.2.10/22-20
22.3.2.1/22-10
22.3.2.2/22-12
22.3.2.3/22-13
22.3.2.4/22-14
22.3.2.5/22-15
22.3.2.6/22-16
22.3.2.7/22-18
22.3.2.8/22-18
22.3.2.9/22-19
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