MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 737

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

26.2
Table 26-2
the PSCs.
Freescale Semiconductor
Memory Map and Register Definition
Table 26-3
provides a simplified memory map for the PSC and FIFOC.
0xFF41_1A00–0xFF41_1EFF Reserved
(FIFOC_BASE)
(PSC0_BASE)
(PSC1_BASE)
(PSC2_BASE)
(PSC8_BASE)
(PSC9_BASE)
0xFF41_1F00
0xFF41_1000
0xFF41_1100
0xFF41_1200
0xFF41_1800
0xFF41_1900
shows the registers for the FIFO controller.
Address
...
MPC5125 Microcontroller Reference Manual, Rev. 2
Table 26-1. PSC and FICOC Memory Map
0x00–0x54: PSC0 registers
0x58–0x7F: Reserved
0x80–0xFF: PSC0 FIFOC registers
0x00–0x54: PSC1 registers
0x58–0x7F: Reserved
0x80–0xFF: PSC1 FIFOC registers
0x00–0x54: PSC2 registers
0x58–0x7F: Reserved
0x80–0xFF: PSC2 FIFOC registers
0x00–0x54: PSC8 registers
0x58–0x7F: Reserved
0x80–0xFF: PSC8 FIFOC registers
0x00–0x54: PSC9 registers
0x58–0x7F: Reserved
0x80–0xFF: PSC9 FIFOC registers
FIFOC registers
Register area
...
Table 26-2
PSC Centralized FIFO Controller (FIFOC)
shows the registers for
26-3